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    <title>topic Re: rt1050 sdram 问题 in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840635#M1645</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;感谢您的回复, 现在有这样一个问题, 我在lwip_tcpecho_freertos工程里使用如下的icf文件, 程序会运行异常, 客户端连不上. 用工程自带的flexspi_nor.icf或者sdram.icf, 程序都能正常运行,&amp;nbsp; 搞不清问题出在哪里, 您可以帮我分析一下吗?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;define symbol m_interrupts_start = 0x60002000;&lt;BR /&gt;define symbol m_interrupts_end = 0x600023FF;&lt;/P&gt;&lt;P&gt;define symbol m_text_start = 0x60002400;&lt;BR /&gt;define symbol m_text_end = 0x63FFFFFF;&lt;/P&gt;&lt;P&gt;define symbol m_data_start = 0x20000000;&lt;BR /&gt;define symbol m_data_end = 0x2001FFFF;&lt;/P&gt;&lt;P&gt;define symbol m_data2_start = 0x20200000;&lt;BR /&gt;define symbol m_data2_end = 0x2023FFFF;&lt;/P&gt;&lt;P&gt;define symbol m_data3_start = 0x80000000;&lt;BR /&gt;define symbol m_data3_end = 0x81DFFFFF;&lt;/P&gt;&lt;P&gt;define symbol m_ncache_start = 0x81E00000;&lt;BR /&gt;define symbol m_ncache_end = 0x81FFFFFF;&lt;/P&gt;&lt;P&gt;define exported symbol m_boot_hdr_conf_start = 0x60000000;&lt;BR /&gt;define symbol m_boot_hdr_ivt_start = 0x60001000;&lt;BR /&gt;define symbol m_boot_hdr_boot_data_start = 0x60001020;&lt;BR /&gt;define symbol m_boot_hdr_dcd_data_start = 0x60001030;&lt;/P&gt;&lt;P&gt;/* Sizes */&lt;BR /&gt;if (isdefinedsymbol(__stack_size__)) {&lt;BR /&gt; define symbol __size_cstack__ = __stack_size__;&lt;BR /&gt;} else {&lt;BR /&gt; define symbol __size_cstack__ = 2048;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;if (isdefinedsymbol(__heap_size__)) {&lt;BR /&gt; define symbol __size_heap__ = __heap_size__;&lt;BR /&gt;} else {&lt;BR /&gt; define symbol __size_heap__ = 25600;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = m_interrupts_start;&lt;BR /&gt;define exported symbol __VECTOR_RAM = m_interrupts_start;&lt;BR /&gt;define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;BR /&gt;define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]&lt;BR /&gt; | mem:[from m_text_start to m_text_end];&lt;/P&gt;&lt;P&gt;define region DATA_region = mem:[from m_data_start to m_data_end];&lt;BR /&gt;define region DATA2_region = mem:[from m_data2_start to m_data2_end];&lt;BR /&gt;define region DATA3_region = mem:[from m_data3_start to m_data3_end-__size_cstack__];&lt;BR /&gt;define region CSTACK_region = mem:[from m_data3_end-__size_cstack__+1 to m_data3_end];&lt;BR /&gt;define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end];&lt;/P&gt;&lt;P&gt;define block CSTACK with alignment = 8, size = __size_cstack__ { };&lt;BR /&gt;define block HEAP with alignment = 8, size = __size_heap__ { };&lt;BR /&gt;define block RW { first readwrite, section m_usb_dma_init_data };&lt;BR /&gt;define block ZI with alignment = 32 { first zi, section m_usb_dma_noninit_data };&lt;BR /&gt;define block NCACHE_VAR with size = 0x200000 , alignment = 0x100000 { section NonCacheable , section NonCacheable.init };&lt;/P&gt;&lt;P&gt;initialize by copy { readwrite, section .textrw };&lt;BR /&gt;do not initialize { section .noinit };&lt;/P&gt;&lt;P&gt;place at address mem: m_interrupts_start { readonly section .intvec };&lt;/P&gt;&lt;P&gt;place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };&lt;BR /&gt;place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };&lt;BR /&gt;place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };&lt;BR /&gt;place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };&lt;/P&gt;&lt;P&gt;keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };&lt;/P&gt;&lt;P&gt;place in TEXT_region { readonly };&lt;BR /&gt;place in DATA3_region { block RW };&lt;BR /&gt;place in DATA3_region { block ZI };&lt;BR /&gt;place in DATA3_region { last block HEAP };&lt;BR /&gt;place in CSTACK_region { block CSTACK };&lt;BR /&gt;place in NCACHE_region { block NCACHE_VAR };&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 16 Jan 2019 06:45:46 GMT</pubDate>
    <dc:creator>chenyulong3313</dc:creator>
    <dc:date>2019-01-16T06:45:46Z</dc:date>
    <item>
      <title>rt1050 sdram 问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840633#M1643</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;你好:&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; 我在用 imxrt1050-evk, &amp;nbsp;sdk 版本是2.4.2, &amp;nbsp;ide是iar, &amp;nbsp;我发现如果使用flexspi_nor_debug配置的话sdram是没有支持起来的, 能使用的内存就很小了, 如果我想程序存储在flash上, 启动后sdram可用, 应该如何修改呢?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 29 Dec 2018 07:49:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840633#M1643</guid>
      <dc:creator>chenyulong3313</dc:creator>
      <dc:date>2018-12-29T07:49:41Z</dc:date>
    </item>
    <item>
      <title>Re: rt1050 sdram 问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840634#M1644</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A _jive_internal="true" data-content-finding="Community" data-userid="331218" data-username="chenyulong3313@163.com" href="https://community.nxp.com/people/chenyulong3313@163.com"&gt;c yl&lt;/A&gt; ,&lt;/P&gt;&lt;P&gt;非常感谢使用NXP产品，很高兴为你提供技术支持！&lt;BR /&gt;假设你还是想让代码从QSPI启动，而在这基础上SDRAM也在启动时，一并被初始化的话，你需要配置Bootable image中的DCD（Device Configuration Data），主要用于SDRAM接口控制器（SEMC）的配置。所以我建议参考此篇文章（&lt;A class="link-titled" href="https://mp.weixin.qq.com/s/6xbXOy3Z-2XaY8U3awdl2Q" title="https://mp.weixin.qq.com/s/6xbXOy3Z-2XaY8U3awdl2Q"&gt;i.MX RT系列MCU启动那些事（6）- Bootable image格式与加载&lt;/A&gt;&amp;nbsp;）了解一下Bootable image的结构内容，同时参考现成的应用：SDK软件包中的queue工程（在\SDK_2.4.2_EVKB-IMXRT1050\boards\evkbimxrt1050\driver_examples\pxp文件下）&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 04 Jan 2019 06:40:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840634#M1644</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-01-04T06:40:01Z</dc:date>
    </item>
    <item>
      <title>Re: rt1050 sdram 问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840635#M1645</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;感谢您的回复, 现在有这样一个问题, 我在lwip_tcpecho_freertos工程里使用如下的icf文件, 程序会运行异常, 客户端连不上. 用工程自带的flexspi_nor.icf或者sdram.icf, 程序都能正常运行,&amp;nbsp; 搞不清问题出在哪里, 您可以帮我分析一下吗?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;define symbol m_interrupts_start = 0x60002000;&lt;BR /&gt;define symbol m_interrupts_end = 0x600023FF;&lt;/P&gt;&lt;P&gt;define symbol m_text_start = 0x60002400;&lt;BR /&gt;define symbol m_text_end = 0x63FFFFFF;&lt;/P&gt;&lt;P&gt;define symbol m_data_start = 0x20000000;&lt;BR /&gt;define symbol m_data_end = 0x2001FFFF;&lt;/P&gt;&lt;P&gt;define symbol m_data2_start = 0x20200000;&lt;BR /&gt;define symbol m_data2_end = 0x2023FFFF;&lt;/P&gt;&lt;P&gt;define symbol m_data3_start = 0x80000000;&lt;BR /&gt;define symbol m_data3_end = 0x81DFFFFF;&lt;/P&gt;&lt;P&gt;define symbol m_ncache_start = 0x81E00000;&lt;BR /&gt;define symbol m_ncache_end = 0x81FFFFFF;&lt;/P&gt;&lt;P&gt;define exported symbol m_boot_hdr_conf_start = 0x60000000;&lt;BR /&gt;define symbol m_boot_hdr_ivt_start = 0x60001000;&lt;BR /&gt;define symbol m_boot_hdr_boot_data_start = 0x60001020;&lt;BR /&gt;define symbol m_boot_hdr_dcd_data_start = 0x60001030;&lt;/P&gt;&lt;P&gt;/* Sizes */&lt;BR /&gt;if (isdefinedsymbol(__stack_size__)) {&lt;BR /&gt; define symbol __size_cstack__ = __stack_size__;&lt;BR /&gt;} else {&lt;BR /&gt; define symbol __size_cstack__ = 2048;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;if (isdefinedsymbol(__heap_size__)) {&lt;BR /&gt; define symbol __size_heap__ = __heap_size__;&lt;BR /&gt;} else {&lt;BR /&gt; define symbol __size_heap__ = 25600;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;define exported symbol __VECTOR_TABLE = m_interrupts_start;&lt;BR /&gt;define exported symbol __VECTOR_RAM = m_interrupts_start;&lt;BR /&gt;define exported symbol __RAM_VECTOR_TABLE_SIZE = 0x0;&lt;/P&gt;&lt;P&gt;define memory mem with size = 4G;&lt;BR /&gt;define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]&lt;BR /&gt; | mem:[from m_text_start to m_text_end];&lt;/P&gt;&lt;P&gt;define region DATA_region = mem:[from m_data_start to m_data_end];&lt;BR /&gt;define region DATA2_region = mem:[from m_data2_start to m_data2_end];&lt;BR /&gt;define region DATA3_region = mem:[from m_data3_start to m_data3_end-__size_cstack__];&lt;BR /&gt;define region CSTACK_region = mem:[from m_data3_end-__size_cstack__+1 to m_data3_end];&lt;BR /&gt;define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end];&lt;/P&gt;&lt;P&gt;define block CSTACK with alignment = 8, size = __size_cstack__ { };&lt;BR /&gt;define block HEAP with alignment = 8, size = __size_heap__ { };&lt;BR /&gt;define block RW { first readwrite, section m_usb_dma_init_data };&lt;BR /&gt;define block ZI with alignment = 32 { first zi, section m_usb_dma_noninit_data };&lt;BR /&gt;define block NCACHE_VAR with size = 0x200000 , alignment = 0x100000 { section NonCacheable , section NonCacheable.init };&lt;/P&gt;&lt;P&gt;initialize by copy { readwrite, section .textrw };&lt;BR /&gt;do not initialize { section .noinit };&lt;/P&gt;&lt;P&gt;place at address mem: m_interrupts_start { readonly section .intvec };&lt;/P&gt;&lt;P&gt;place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };&lt;BR /&gt;place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };&lt;BR /&gt;place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };&lt;BR /&gt;place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };&lt;/P&gt;&lt;P&gt;keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };&lt;/P&gt;&lt;P&gt;place in TEXT_region { readonly };&lt;BR /&gt;place in DATA3_region { block RW };&lt;BR /&gt;place in DATA3_region { block ZI };&lt;BR /&gt;place in DATA3_region { last block HEAP };&lt;BR /&gt;place in CSTACK_region { block CSTACK };&lt;BR /&gt;place in NCACHE_region { block NCACHE_VAR };&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Jan 2019 06:45:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840635#M1645</guid>
      <dc:creator>chenyulong3313</dc:creator>
      <dc:date>2019-01-16T06:45:46Z</dc:date>
    </item>
    <item>
      <title>Re: rt1050 sdram 问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840636#M1646</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A _jive_internal="true" class="" data-containerid="-1" data-containertype="-1" data-content-finding="Community" data-objectid="331218" data-objecttype="3" href="https://community.nxp.com/people/chenyulong3313@163.com"&gt;c yl&lt;/A&gt; ,&lt;/P&gt;&lt;P&gt;感谢回复。&lt;/P&gt;&lt;P&gt;请最好介绍一下代码到底出了什么样的错误，比如有什么具体表现，还有你有进入debug模式下测试过吗？&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Jan 2019 02:24:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840636#M1646</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-01-17T02:24:53Z</dc:date>
    </item>
    <item>
      <title>Re: rt1050 sdram 问题</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840637#M1647</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;已解决. 只修改icf文件还不够, 还要修改C/C++ Compiler-&amp;gt;Preprocessor中的Defined symbols:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;DEBUG&lt;BR /&gt;SKIP_SYSCLK_INIT&lt;BR /&gt;XIP_EXTERNAL_FLASH=1&lt;BR /&gt;XIP_BOOT_HEADER_ENABLE=1&lt;BR /&gt;XIP_BOOT_HEADER_DCD_ENABLE=1&lt;BR /&gt;CPU_MIMXRT1052DVL6B&lt;BR /&gt;FSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE&lt;BR /&gt;FSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1&lt;BR /&gt;PRINTF_ADVANCED_ENABLE=1&lt;BR /&gt;USE_RTOS=1&lt;BR /&gt;FSL_RTOS_FREE_RTOS&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;就可以了.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Jan 2019 06:19:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/rt1050-sdram-%E9%97%AE%E9%A2%98/m-p/840637#M1647</guid>
      <dc:creator>chenyulong3313</dc:creator>
      <dc:date>2019-01-17T06:19:43Z</dc:date>
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