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    <title>i.MX RT Crossover MCUsのトピックRe: Difference between IP Command and AIX Command</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836431#M1604</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please refer to sections 49.4.4 (Device access by AXI Command) and 49.4.5 (Device access &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;by IP Command) of i.MX RT1050 Reference Manual, Rev. 1, 03/2018, for some details. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;Commands, concerned with data transfer to / from (internal) device address area from / to system &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;memory (DMA) are considered as AXI command in contrast to commands, concerned with controller &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;settings and access to controller address area. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 23 Jul 2018 08:10:38 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2018-07-23T08:10:38Z</dc:date>
    <item>
      <title>Difference between IP Command and AIX Command</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836430#M1603</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Currently, I am working on the&amp;nbsp;i.MX RT1050 Processor. I see that the processor supports two command modes for NAND device: IP Command and AXI Command.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I would like to ask what are the difference between the two above modes.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks and Regards,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 20 Jul 2018 08:52:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836430#M1603</guid>
      <dc:creator>toandang</dc:creator>
      <dc:date>2018-07-20T08:52:26Z</dc:date>
    </item>
    <item>
      <title>Re: Difference between IP Command and AIX Command</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836431#M1604</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please refer to sections 49.4.4 (Device access by AXI Command) and 49.4.5 (Device access &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;by IP Command) of i.MX RT1050 Reference Manual, Rev. 1, 03/2018, for some details. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;Commands, concerned with data transfer to / from (internal) device address area from / to system &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;memory (DMA) are considered as AXI command in contrast to commands, concerned with controller &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;settings and access to controller address area. &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 23 Jul 2018 08:10:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836431#M1604</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-07-23T08:10:38Z</dc:date>
    </item>
    <item>
      <title>Re: Difference between IP Command and AIX Command</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836432#M1605</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have one question about AXI Command application as below. Could you also help check it? Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;A AXI Command write instruction operation will actually emit four write operating waveforms, and all the four write operation addresses are 4 byte aligned, and all are increased from the relative address 0 to the relative address 3.&amp;nbsp;&lt;/P&gt;&lt;P&gt;The same procedure is tested by IP Command instruction without any of the above problems. The waveform is also normal.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Jul 2018 13:35:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836432#M1605</guid>
      <dc:creator>hansonhe</dc:creator>
      <dc:date>2018-07-31T13:35:14Z</dc:date>
    </item>
    <item>
      <title>Re: Difference between IP Command and AIX Command</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836433#M1606</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; NAND is such device, which does not have (storage memory) address area, accessible via&lt;/P&gt;&lt;P&gt;AXI commands. IMX RT NAND interface only supports page based read/write IP operations.&amp;nbsp; &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 01 Aug 2018 03:50:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Difference-between-IP-Command-and-AIX-Command/m-p/836433#M1606</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-08-01T03:50:51Z</dc:date>
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