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    <title>i.MX RT Crossover MCUsのトピックRe: IMXRT1024 LPUART FIFO Issue</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1328428#M16018</link>
    <description>&lt;P&gt;Sorry, I made a mistake here, watermark is not FIFO size.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please refer to LPUART FIFO register for FIFO size.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_0-1629794582818.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/153851i791EEC45EDD1DD29/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielchen_0-1629794582818.png" alt="danielchen_0-1629794582818.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;danielchen_0-1629794582818.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_1-1629794605355.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/153852i9D6CB7A6E459308C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielchen_1-1629794605355.png" alt="danielchen_1-1629794605355.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;danielchen_1-1629794605355.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can configure this register for FIFO size.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Tue, 24 Aug 2021 08:44:10 GMT</pubDate>
    <dc:creator>danielchen</dc:creator>
    <dc:date>2021-08-24T08:44:10Z</dc:date>
    <item>
      <title>IMXRT1024 LPUART FIFO Issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1327537#M15983</link>
      <description>&lt;P&gt;Hi all,&lt;/P&gt;&lt;P&gt;I'm setting the LPUART FIFO RX and TX sizes and it only seems to be 4 words and cannot be set to any other value. &amp;nbsp;In the RM it says maximum number of receive or transmit fifo size data word can be up to 256 words.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have examine the following register:&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;STRONG&gt;Parameter Register (PARAM)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;LPUART FIFO Register (FIFO)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;LPUART Watermark Register (WATER)&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;But nothing is work to set my FIFO size..&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;How can I set it manually?&lt;/P&gt;&lt;P&gt;Why do you write, from 1word to 256word, on RM like a size-scale for FIFO if I am not able to use that size?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks and Regards.&lt;/P&gt;</description>
      <pubDate>Mon, 23 Aug 2021 07:39:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1327537#M15983</guid>
      <dc:creator>Lukas_Frank</dc:creator>
      <dc:date>2021-08-23T07:39:08Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1024 LPUART FIFO Issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1327623#M15986</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/187781"&gt;@Lukas_Frank&lt;/a&gt;&amp;nbsp;:&lt;/P&gt;
&lt;P&gt;From the source code, you can configure the FIFO size the before LPUART_INIT function&lt;/P&gt;
&lt;P&gt;/*&lt;BR /&gt;* config.baudRate_Bps = 115200U;&lt;BR /&gt;* config.parityMode = kLPUART_ParityDisabled;&lt;BR /&gt;* config.stopBitCount = kLPUART_OneStopBit;&lt;BR /&gt;* config.txFifoWatermark = 0;&lt;BR /&gt;* config.rxFifoWatermark = 0;&lt;BR /&gt;* config.enableTx = false;&lt;BR /&gt;* config.enableRx = false;&lt;BR /&gt;*/&lt;BR /&gt;LPUART_GetDefaultConfig(&amp;amp;config);&lt;BR /&gt;config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;&lt;BR /&gt;config.enableTx = true;&lt;BR /&gt;config.enableRx = true;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;config.txFifoWatermark = your size;&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;config.rxFifoWatermark = youe size;&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;
&lt;P&gt;LPUART_Init(DEMO_LPUART, &amp;amp;config, DEMO_LPUART_CLK_FREQ);&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;</description>
      <pubDate>Mon, 23 Aug 2021 08:40:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1327623#M15986</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2021-08-23T08:40:41Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1024 LPUART FIFO Issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1327748#M15991</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/369"&gt;@danielchen&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I set it, but there was no action more than 4 word. There is an assert rule in LPUART_Init. So I am not able to set my FIFO size more than 4. But in reference manual it is read-only form from&lt;SPAN&gt;&amp;nbsp;1word to 256word. What is the actual size of this FIFO?&amp;nbsp;I indicate that in my question why do not you choose not to answer it ?&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Could you please view my other question?&amp;nbsp;&lt;A title="Question Get Send/Receive Data Count" href="https://community.nxp.com/t5/i-MX-RT/IMXRT1024-LPUART-Get-Send-Receive-Count/m-p/1326956#M15973" target="_self"&gt;Question Get Send/Receive Data Count&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks and Regards.&lt;/P&gt;</description>
      <pubDate>Mon, 23 Aug 2021 11:21:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1327748#M15991</guid>
      <dc:creator>Lukas_Frank</dc:creator>
      <dc:date>2021-08-23T11:21:46Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1024 LPUART FIFO Issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1328428#M16018</link>
      <description>&lt;P&gt;Sorry, I made a mistake here, watermark is not FIFO size.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Please refer to LPUART FIFO register for FIFO size.&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_0-1629794582818.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/153851i791EEC45EDD1DD29/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielchen_0-1629794582818.png" alt="danielchen_0-1629794582818.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;danielchen_0-1629794582818.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="danielchen_1-1629794605355.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/153852i9D6CB7A6E459308C/image-size/medium?v=v2&amp;amp;px=400" role="button" title="danielchen_1-1629794605355.png" alt="danielchen_1-1629794605355.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;danielchen_1-1629794605355.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;You can configure this register for FIFO size.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards&lt;/P&gt;
&lt;P&gt;Daniel&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 24 Aug 2021 08:44:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1328428#M16018</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2021-08-24T08:44:10Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1024 LPUART FIFO Issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1329164#M16042</link>
      <description>&lt;P&gt;Dear &lt;A href="https://community.nxp.com/t5/user/viewprofilepage/user-id/369" target="_blank" rel="noopener"&gt;@danielchen&lt;/A&gt; Hi again,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I set it, but there was no action more than 4 word. Also RM is spesified that this field is read only. When I set RXFIFOSIZE to 256, it still returns RXCOUNT&lt;SPAN&gt;&amp;nbsp;as 4 word maximum. I am just trying to measure what is the size of incoming bytes. What is the truth about FIFO?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Lukas_Frank_0-1629873691603.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/154038iFB17C24629022D9B/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Lukas_Frank_0-1629873691603.png" alt="Lukas_Frank_0-1629873691603.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Lukas_Frank_0-1629873691603.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Lukas_Frank_2-1629873764051.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/154040i75F378D235D138D2/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Lukas_Frank_2-1629873764051.png" alt="Lukas_Frank_2-1629873764051.png" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;Lukas_Frank_2-1629873764051.png&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Could you please also view my other question?&lt;/P&gt;&lt;P&gt;&lt;A title="Question Get Send/Receive Data Count" href="https://community.nxp.com/t5/i-MX-RT/IMXRT1024-LPUART-Get-Send-Receive-Count/m-p/1326956#M15973" target="_self"&gt;Question Get Send/Receive Data Count&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks and Regards.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Aug 2021 06:43:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1329164#M16042</guid>
      <dc:creator>Lukas_Frank</dc:creator>
      <dc:date>2021-08-25T06:43:24Z</dc:date>
    </item>
    <item>
      <title>Re: IMXRT1024 LPUART FIFO Issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1346596#M16476</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Sorry, I confirmed with hardware team,&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;The RXFIFO size is 4 data words.&amp;nbsp; It is a fixed value, a hardware attribute, not configurable.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Regards&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Daniel&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Mon, 27 Sep 2021 07:58:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/IMXRT1024-LPUART-FIFO-Issue/m-p/1346596#M16476</guid>
      <dc:creator>danielchen</dc:creator>
      <dc:date>2021-09-27T07:58:36Z</dc:date>
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