<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX RT Crossover MCUsのトピックSDRAM issue</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1305781#M15214</link>
    <description>&lt;P&gt;Hai im using IMXRT1062 processor where my bootloader uses SRAM_DTC and flashed at 0x60000000 and my application uses SDRAM and flashed at 0x60020000 ,when i try to jump from bootloader to application im facing issues what might be the issue?&lt;/P&gt;&lt;P&gt;APPLICATION_ADDRESS =0x60020000&lt;/P&gt;&lt;P&gt;void flash_jump_to_app(void)&lt;BR /&gt;{&lt;BR /&gt;__disable_irq();&lt;BR /&gt;SCB-&amp;gt;VTOR =APPLICATION_ADDRESS;&lt;BR /&gt;uint32_t Base_Address = APPLICATION_ADDRESS;&lt;BR /&gt;JumpApplication(*(uint32_t*)Base_Address, *(uint32_t*)(Base_Address+4));&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;JumpApplication(uint32_t topOfMainStack, uint32_t AppAddr)&lt;BR /&gt;{&lt;BR /&gt;__ASM volatile ("mov SP, %0" : : "r" (topOfMainStack) : );&lt;BR /&gt;__ASM volatile ("mov PC, %0" : : "r" (AppAddr) : );&lt;BR /&gt;}&lt;/P&gt;</description>
    <pubDate>Sun, 11 Jul 2021 16:00:12 GMT</pubDate>
    <dc:creator>vijayc1</dc:creator>
    <dc:date>2021-07-11T16:00:12Z</dc:date>
    <item>
      <title>SDRAM issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1305781#M15214</link>
      <description>&lt;P&gt;Hai im using IMXRT1062 processor where my bootloader uses SRAM_DTC and flashed at 0x60000000 and my application uses SDRAM and flashed at 0x60020000 ,when i try to jump from bootloader to application im facing issues what might be the issue?&lt;/P&gt;&lt;P&gt;APPLICATION_ADDRESS =0x60020000&lt;/P&gt;&lt;P&gt;void flash_jump_to_app(void)&lt;BR /&gt;{&lt;BR /&gt;__disable_irq();&lt;BR /&gt;SCB-&amp;gt;VTOR =APPLICATION_ADDRESS;&lt;BR /&gt;uint32_t Base_Address = APPLICATION_ADDRESS;&lt;BR /&gt;JumpApplication(*(uint32_t*)Base_Address, *(uint32_t*)(Base_Address+4));&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;JumpApplication(uint32_t topOfMainStack, uint32_t AppAddr)&lt;BR /&gt;{&lt;BR /&gt;__ASM volatile ("mov SP, %0" : : "r" (topOfMainStack) : );&lt;BR /&gt;__ASM volatile ("mov PC, %0" : : "r" (AppAddr) : );&lt;BR /&gt;}&lt;/P&gt;</description>
      <pubDate>Sun, 11 Jul 2021 16:00:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1305781#M15214</guid>
      <dc:creator>vijayc1</dc:creator>
      <dc:date>2021-07-11T16:00:12Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1306527#M15236</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/188956"&gt;@vijayc1&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;As you know, the SDRAM is the external memory,&amp;nbsp; and the RT using the SEMC to communicate with the extenral SDRAM chip.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; So, if you want the SDRAM works, you need to do the SEMC configuration for the SDRAM at first.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; Normally, we use the DCD code to configure it, so, you can use the bootloader code to add the IVT to initialize it, the DCD location is from 0x60001030.&lt;/P&gt;
&lt;P&gt;&amp;nbsp; &amp;nbsp;Wish it helps you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp; If you still have questions about it, please kindly let me know.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Kerry&lt;/P&gt;</description>
      <pubDate>Tue, 13 Jul 2021 04:16:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1306527#M15236</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2021-07-13T04:16:34Z</dc:date>
    </item>
    <item>
      <title>Re: SDRAM issue</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1308100#M15291</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/60336"&gt;@kerryzhou&lt;/a&gt;&amp;nbsp; thank you for the reply it worked.&lt;/P&gt;</description>
      <pubDate>Thu, 15 Jul 2021 03:58:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/SDRAM-issue/m-p/1308100#M15291</guid>
      <dc:creator>vijayc1</dc:creator>
      <dc:date>2021-07-15T03:58:11Z</dc:date>
    </item>
  </channel>
</rss>

