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    <title>i.MX RT Crossover MCUs中的主题 Re: HyperRAM boot</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817718#M1246</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Niles,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I haven't got the opportunity to try that.&lt;/P&gt;&lt;P&gt;Our system engineer decided to move to another architecture and different memories.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 06 Feb 2019 14:26:21 GMT</pubDate>
    <dc:creator>rans</dc:creator>
    <dc:date>2019-02-06T14:26:21Z</dc:date>
    <item>
      <title>HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817707#M1235</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is there an example showing how to boot an application with HyperRAM ? (I've searched in imxRT 1050 documentation but didn't find any reference).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Or is it actually the same as running from HyperFlash (FlexSPI interface in 0x60000000) without any&amp;nbsp;special configuration in memory controller ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;ranran&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 05:48:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817707#M1235</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2018-09-12T05:48:36Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM example</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817708#M1236</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ranran&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please look at AN12239 How to Enable HyperRAM with i.MX RT&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/nxp/application-notes/AN12239.pdf" title="https://www.nxp.com/docs/en/nxp/application-notes/AN12239.pdf"&gt;https://www.nxp.com/docs/en/nxp/application-notes/AN12239.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 06:07:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817708#M1236</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-09-12T06:07:36Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM example</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817709#M1237</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you very much.&lt;/P&gt;&lt;P&gt;According to this AN&amp;nbsp;is seems that the code is running from ram or sdram and then access hyperRAM.&lt;/P&gt;&lt;P&gt;But we need to &lt;SPAN style="text-decoration: underline;"&gt;boot from hyperRAM&lt;/SPAN&gt;&amp;nbsp;. Is it&amp;nbsp;possible to boot from flash into hyperRAM?&amp;nbsp; How ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Another thing is that I can't find the source code package which is referenced in&amp;nbsp;this AN. Where can it be downloaded from ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;ranran&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 06:40:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817709#M1237</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2018-09-12T06:40:45Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM example</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817710#M1238</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;i.MXRT1050 Reference Manual sect.8.6.1 Serial NOR Flash Boot via FlexSPI&lt;/P&gt;&lt;P&gt;lists only HyperFlash as boot option, seems boot from hyperRAM is not supported.&lt;/P&gt;&lt;P&gt;i.MX RT1050 SDK can be obtained from&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://mcuxpresso.nxp.com/en/welcome" title="https://mcuxpresso.nxp.com/en/welcome"&gt;Welcome | MCUXpresso SDK Builder&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 08:22:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817710#M1238</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-09-12T08:22:45Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM example</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817711#M1239</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for the help.&lt;/P&gt;&lt;P&gt;Just to make the question direct as possible:&lt;/P&gt;&lt;P&gt;We plan use the following chip:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://www.cypress.com/file/322936/download" title="http://www.cypress.com/file/322936/download"&gt;http://www.cypress.com/file/322936/download&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;It is memory chip&amp;nbsp;combined of both hyperRAM and hyperFLASH in one unit.&lt;/LI&gt;&lt;LI&gt;It uses CS to select between the hyperRAM and hyperFLASH&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We wanted to use it similarly as done here, but instead of serial NOR we use hyperFLASH and instead of SDRAM: to use hyperRAM.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-340655"&gt;RT1050 - Booting from serial NOR flash to SDRAM&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We are not sure yet about the correctness of using this merged RAM&amp;amp;FLASH chip for the boot, especially the issue of CS which might be problematic for the boot using MCU (MCU bootrom shall need to copy from flash to RAM ).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you please say if you think it is possible to use this device for bootring from hyperFlash to hyperRAM ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you,&lt;/P&gt;&lt;P&gt;ranran&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 15:59:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817711#M1239</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2018-09-12T15:59:46Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817712#M1240</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi ranran&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think one can use hyperRAM instead of serial NOR hyperFLASH for your case.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Sep 2018 00:54:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817712#M1240</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-09-13T00:54:53Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817713#M1241</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;P&gt;I understand. That's seems reasonable because both hyperRAM and hyperRAM reside in the same memory space (flexSPI, 0x60000000).&lt;/P&gt;&lt;P&gt;Yet, hyperRAM is voltile memory, which means that it can't be used to store the application between reboot.&lt;/P&gt;&lt;P&gt;We use a combined chip:&lt;/P&gt;&lt;P&gt;&lt;A data-content-finding="Community" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.cypress.com%2Ffile%2F322936%2Fdownload" rel="nofollow" style="color: #3d9ce7; background-color: #ffffff; border: 0px; text-decoration: none; padding: 0px calc(12px + 0.35ex) 0px 0px;" target="_blank"&gt;http://www.cypress.com/file/322936/download&lt;/A&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;The question is if it is possible to boot from hyperFlash and then rellocate the application from hyperflash to hyperram and&amp;nbsp;continue running the application ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Ranan&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Sep 2018 06:26:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817713#M1241</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2018-09-13T06:26:54Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817714#M1242</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV class=""&gt;&lt;P&gt;Hi ranran&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I think yes this is possible.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Sep 2018 06:57:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817714#M1242</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-09-13T06:57:58Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817715#M1243</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Igor,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can't find the source code which need to be attached to this AN.&lt;/P&gt;&lt;P&gt;Where can I find it ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you so much,&lt;/P&gt;&lt;P&gt;ranran&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Sep 2018 15:27:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817715#M1243</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2018-09-13T15:27:10Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817716#M1244</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/nxp/application-notes-software/AN12239SW.zip" title="https://www.nxp.com/docs/en/nxp/application-notes-software/AN12239SW.zip"&gt;https://www.nxp.com/docs/en/nxp/application-notes-software/AN12239SW.zip&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 21 Sep 2018 10:52:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817716#M1244</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2018-09-21T10:52:26Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817717#M1245</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ranan,&lt;/P&gt;&lt;P&gt;were you able to achieve this? I am kind of trying to do the same!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Nilesh&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 02 Feb 2019 00:13:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817717#M1245</guid>
      <dc:creator>nileshbadodekar</dc:creator>
      <dc:date>2019-02-02T00:13:34Z</dc:date>
    </item>
    <item>
      <title>Re: HyperRAM boot</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817718#M1246</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Niles,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I haven't got the opportunity to try that.&lt;/P&gt;&lt;P&gt;Our system engineer decided to move to another architecture and different memories.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Feb 2019 14:26:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/HyperRAM-boot/m-p/817718#M1246</guid>
      <dc:creator>rans</dc:creator>
      <dc:date>2019-02-06T14:26:21Z</dc:date>
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