<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX RT Crossover MCUsのトピックNeed for encrypted code in internal QSPI?</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Need-for-encrypted-code-in-internal-QSPI/m-p/1211399#M12167</link>
    <description>&lt;P&gt;Hi All&lt;/P&gt;&lt;P&gt;I would like to know whether anyone knows of potential security problems when running unencrypted code from XiP internal QSPI in i.MX RT 1024 or i.MX RT 1064?&lt;/P&gt;&lt;P&gt;Background:&lt;BR /&gt;- when on-the-fly encryption is used in XiP QSPI flash there is a performance hit over un-encrypted operation (I have "heard" of 1/3 but not found a specification for the actual overhead)&lt;BR /&gt;- assuming there is no way to access the content of the internal QSPI flash (JTAG/SWD and ISP disabled), or monitor any of the internal signals, it is presumably safe to store code in unencrypted form and thus &lt;STRONG&gt;not have any performance reduction&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;If this can be confirmed it can give an incentive to using these parts with integrated memory over parts needing external QSPI, in addition to saving space and inventory overhead.&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 14 Jan 2021 00:43:16 GMT</pubDate>
    <dc:creator>mjbcswitzerland</dc:creator>
    <dc:date>2021-01-14T00:43:16Z</dc:date>
    <item>
      <title>Need for encrypted code in internal QSPI?</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Need-for-encrypted-code-in-internal-QSPI/m-p/1211399#M12167</link>
      <description>&lt;P&gt;Hi All&lt;/P&gt;&lt;P&gt;I would like to know whether anyone knows of potential security problems when running unencrypted code from XiP internal QSPI in i.MX RT 1024 or i.MX RT 1064?&lt;/P&gt;&lt;P&gt;Background:&lt;BR /&gt;- when on-the-fly encryption is used in XiP QSPI flash there is a performance hit over un-encrypted operation (I have "heard" of 1/3 but not found a specification for the actual overhead)&lt;BR /&gt;- assuming there is no way to access the content of the internal QSPI flash (JTAG/SWD and ISP disabled), or monitor any of the internal signals, it is presumably safe to store code in unencrypted form and thus &lt;STRONG&gt;not have any performance reduction&lt;/STRONG&gt;.&lt;/P&gt;&lt;P&gt;If this can be confirmed it can give an incentive to using these parts with integrated memory over parts needing external QSPI, in addition to saving space and inventory overhead.&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Mark&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2021 00:43:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Need-for-encrypted-code-in-internal-QSPI/m-p/1211399#M12167</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2021-01-14T00:43:16Z</dc:date>
    </item>
  </channel>
</rss>

