<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Knowledge base article - reallocating flexRAM in i.MX RT Crossover MCUs</title>
    <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158766#M10261</link>
    <description>&lt;P&gt;Regarding this KB article:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Reallocating-the-FlexRAM/ta-p/1117649" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Reallocating-the-FlexRAM/ta-p/1117649&lt;/A&gt;&lt;/P&gt;&lt;P&gt;I think there is a mistake in this, regarding the memory regions defined in&amp;nbsp;&lt;SPAN&gt;BOARD_ConfigMPU() in board.c&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The article says that region 5 is&amp;nbsp;SRAM_ITC, region 6 is&amp;nbsp;SRAM_DTC and region 7 is&amp;nbsp;SRAM_OCRAM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I think, region 4 is ITC (address 0), region 5 is DTC (address 20,000,000) and region 7 is OCRAM (address 20,280,000)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Does anyone else agree?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/1431"&gt;@mjbcswitzerland&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126273"&gt;@victorjimenez&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/117617"&gt;@Sabina_Bruce&lt;/a&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-Nick&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Thu, 24 Sep 2020 15:23:52 GMT</pubDate>
    <dc:creator>nickwallis</dc:creator>
    <dc:date>2020-09-24T15:23:52Z</dc:date>
    <item>
      <title>Knowledge base article - reallocating flexRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158766#M10261</link>
      <description>&lt;P&gt;Regarding this KB article:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Reallocating-the-FlexRAM/ta-p/1117649" target="_blank"&gt;https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/Reallocating-the-FlexRAM/ta-p/1117649&lt;/A&gt;&lt;/P&gt;&lt;P&gt;I think there is a mistake in this, regarding the memory regions defined in&amp;nbsp;&lt;SPAN&gt;BOARD_ConfigMPU() in board.c&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The article says that region 5 is&amp;nbsp;SRAM_ITC, region 6 is&amp;nbsp;SRAM_DTC and region 7 is&amp;nbsp;SRAM_OCRAM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I think, region 4 is ITC (address 0), region 5 is DTC (address 20,000,000) and region 7 is OCRAM (address 20,280,000)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Does anyone else agree?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/1431"&gt;@mjbcswitzerland&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126273"&gt;@victorjimenez&lt;/a&gt;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/117617"&gt;@Sabina_Bruce&lt;/a&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;-Nick&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 24 Sep 2020 15:23:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158766#M10261</guid>
      <dc:creator>nickwallis</dc:creator>
      <dc:date>2020-09-24T15:23:52Z</dc:date>
    </item>
    <item>
      <title>Re: Knowledge base article - reallocating flexRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158799#M10263</link>
      <description>&lt;P&gt;Hello Nick,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The regions mentioned in the community document are the correct ones. As you can see in the below image region 5 also starts at address 0x0 which corresponds to the ITC. Also, the size of this region matches the default FlexRAM configuration, 128KB, when the size of region 4 is 1GB. Region 4 does not correspond to the FlexRAM ITC.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="victorjimenez_0-1600965116560.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/126127i0876343788CFC4B0/image-size/medium?v=v2&amp;amp;px=400" role="button" title="victorjimenez_0-1600965116560.png" alt="victorjimenez_0-1600965116560.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;/P&gt;
&lt;P&gt;Victor&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;/P&gt;
&lt;P&gt;Note:&lt;/P&gt;
&lt;P&gt;- If this post answers your question, please click the "Mark Correct"button. Thank you!&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;/P&gt;
&lt;P&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Thu, 24 Sep 2020 16:32:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158799#M10263</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2020-09-24T16:32:33Z</dc:date>
    </item>
    <item>
      <title>Re: Knowledge base article - reallocating flexRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158889#M10267</link>
      <description>&lt;P&gt;Nick&lt;/P&gt;&lt;P&gt;There is no region that is fixed - each entry depends on how it is programmed by the code.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;EM&gt;BOARD_ConfigMPU()&lt;/EM&gt; will not be the same for each processor since the FlexRAM OCR address is not the same for an i.MX RT 1020 compared to an i.MX RT 1060, for example. Therefore it could decide to put the SRAM_ITC in region 1, 3 or 7, as it chooses, but the principle stays the same.&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Mark&lt;BR /&gt;&lt;EM&gt;uTasker project developer for Kinetis and i.MX RT]&lt;/EM&gt;&lt;BR /&gt;&lt;FONT color="#999999"&gt;Contact me by personal message or on the uTasker web site to discuss professional training or product development requirements&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 24 Sep 2020 21:28:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1158889#M10267</guid>
      <dc:creator>mjbcswitzerland</dc:creator>
      <dc:date>2020-09-24T21:28:46Z</dc:date>
    </item>
    <item>
      <title>Re: Knowledge base article - reallocating flexRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1159102#M10278</link>
      <description>&lt;P&gt;Thanks both&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/1431"&gt;@mjbcswitzerland&lt;/a&gt;&amp;nbsp;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/126273"&gt;@victorjimenez&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yes now I can see that my board.c file contents (based on 1060) are different to the one that is used in the knowledge base (based on 1050).&lt;/P&gt;&lt;P&gt;But when you first read the knowledge base article, this is not obvious and is not made clear.&lt;/P&gt;&lt;P&gt;-Nick&lt;/P&gt;</description>
      <pubDate>Fri, 25 Sep 2020 06:30:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1159102#M10278</guid>
      <dc:creator>nickwallis</dc:creator>
      <dc:date>2020-09-25T06:30:20Z</dc:date>
    </item>
    <item>
      <title>Re: Knowledge base article - reallocating flexRAM</title>
      <link>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1159406#M10289</link>
      <description>&lt;P&gt;Hi Nick,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Thanks for sharing your feedback! I will update the document to be more clear on this part!&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Victor&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 25 Sep 2020 14:43:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-RT-Crossover-MCUs/Knowledge-base-article-reallocating-flexRAM/m-p/1159406#M10289</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2020-09-25T14:43:18Z</dc:date>
    </item>
  </channel>
</rss>

