How to configure a memory controller

rans — Sun, 09 Sep 2018 12:40:34 GMT

Hello,

We plan to use the following memory configuration with iMX RT1050 using HyperBUS:

As you can see below there are 4 memory units:

1. HyperRAM memory unit which contains connected with hyperBUs and CS1.

2. HyperFLASH memory unit which contains connected with hyperBUs and CS1. (switch decides if CS1 is connected to Hyperram from section 1 or hyperFlash from section2)

3. HyperFLASH memory unit which contains connected with hyperBUs and CS2.

4. QSPI flash connected through qspi bus.

---HyperBUS-----------------------------------------------------------------------------------------

| (hyperbus)

---CS1-----------------------------------------------------/ (switch)--------HyperRAM ------ |

\------------HyperFlash (boot) -----|

MCU |

---CS2-------------------------------------------------------------------------HyperFlash --------

---QSPI------------------------------------------------------------------------QSPI FLASH

Does this configuration requires specific settings in memory controller or is it supported out-of-the box in MCUExpresso FreeRTOS ?

If it does - how do we configure the memory controller to support this configuration (Is it described in documentation) ?

Thank you,

ranran

Re: How to configure a memory controller

igorpadykov — Sun, 09 Sep 2018 23:02:37 GMT

Hi ranran

there are appnotes on below link like AN12239 How to Enable HyperRAM with i.MX RT,

AN12183 How to Enable Debugging for FLEXSPI NOR Flash which may be helpful

for configuring such setup

i.MX RT1050 MCU/Applications Crossover Processor | Arm® Cortex®-M7 @600 MHz, 512KB SRAM |NXP

Linux (at91) kernel may not support it, note nxp does not support this kenel so may be useful

also post this on corresponding kernel mail list.

Best regards
igor
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topic Re: How to configure a memory controller in i.MX RT Crossover MCUs

How to configure a memory controller

Re: How to configure a memory controller