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    <title>i.MX Solutions中的主题 Debugging on EVK-MIMXRT1060</title>
    <link>https://community.nxp.com/t5/i-MX-Solutions/Debugging-on-EVK-MIMXRT1060/m-p/2195130#M665</link>
    <description>&lt;P&gt;After flashing a program using IAR enbedded workbench, the following is displayed in the debug log&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;: The processor cannot be debugged.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: The debug registers are not accessible or&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: the CPU clock is stalled by the memory controller.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Reset or power cycle the board.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: CPU status FAILED&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Cannot initialize DAP access.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;and when trying to reset, it shows the following message on debug log&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;: LowLevelReset(software, delay 200)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Failed to read SP and PC from vector table at 0x0&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Target reset&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: ..\..\..\..\example_project\iar/evkmimxrt1060.mac(63,27): Error: Operation error.&amp;nbsp;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN&gt;: Error while calling macro execUserReset&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;What could be the reason behind the messages and how can it be solved?&lt;BR /&gt;&lt;BR /&gt;Thank you!&lt;/P&gt;</description>
    <pubDate>Wed, 29 Oct 2025 13:06:02 GMT</pubDate>
    <dc:creator>ArbinDhakal</dc:creator>
    <dc:date>2025-10-29T13:06:02Z</dc:date>
    <item>
      <title>Debugging on EVK-MIMXRT1060</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Debugging-on-EVK-MIMXRT1060/m-p/2195130#M665</link>
      <description>&lt;P&gt;After flashing a program using IAR enbedded workbench, the following is displayed in the debug log&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;: The processor cannot be debugged.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: The debug registers are not accessible or&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: the CPU clock is stalled by the memory controller.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Reset or power cycle the board.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: CPU status FAILED&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Cannot initialize DAP access.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;and when trying to reset, it shows the following message on debug log&lt;/P&gt;&lt;DIV&gt;&lt;SPAN&gt;: LowLevelReset(software, delay 200)&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Failed to read SP and PC from vector table at 0x0&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: Target reset&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;: ..\..\..\..\example_project\iar/evkmimxrt1060.mac(63,27): Error: Operation error.&amp;nbsp;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN&gt;: Error while calling macro execUserReset&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;BR /&gt;What could be the reason behind the messages and how can it be solved?&lt;BR /&gt;&lt;BR /&gt;Thank you!&lt;/P&gt;</description>
      <pubDate>Wed, 29 Oct 2025 13:06:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Debugging-on-EVK-MIMXRT1060/m-p/2195130#M665</guid>
      <dc:creator>ArbinDhakal</dc:creator>
      <dc:date>2025-10-29T13:06:02Z</dc:date>
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