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    <title>topic Re: Post TP2850 driver on i.MX8M Plus in i.MX Solutions</title>
    <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241512#M108</link>
    <description>&lt;P&gt;Device tree setting should be related to your issue.&lt;/P&gt;</description>
    <pubDate>Mon, 08 Mar 2021 05:56:43 GMT</pubDate>
    <dc:creator>qiang_li-mpu_se</dc:creator>
    <dc:date>2021-03-08T05:56:43Z</dc:date>
    <item>
      <title>Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1238664#M104</link>
      <description>&lt;P&gt;Hi All&lt;/P&gt;&lt;P&gt;I try to post TP2850&amp;nbsp;on i.MX8M Plus&lt;/P&gt;&lt;P&gt;TP2850 created link to&amp;nbsp;mxc-mipi-csi2.1, and&amp;nbsp; registered mxc_isi.1.capture as /dev/video1 as below&lt;/P&gt;&lt;P&gt;[ 8.616588] mx8-img-md: Registered mxc_isi.0.capture as /dev/video0&lt;BR /&gt;[ 8.634974] mx8-img-md: Registered mxc_isi.1.capture as /dev/video1&lt;BR /&gt;[ 8.641319] mx8-img-md: Registered sensor subdevice: tp2850_mipi 2-0045 (1)&lt;BR /&gt;[ 8.651709] mx8-img-md: created link [mxc_isi.0] =&amp;gt; [mxc_isi.0.capture]&lt;BR /&gt;[ 8.661796] mx8-img-md: created link [mxc_isi.1] =&amp;gt; [mxc_isi.1.capture]&lt;BR /&gt;[ 8.671865] mx8-img-md: created link [mxc-mipi-csi2.1] =&amp;gt; [mxc_isi.1]&lt;BR /&gt;[ 8.678323] mx8-img-md: created link [tp2850_mipi 2-0045] =&amp;gt; [mxc-mipi-csi2.1]&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;I use below command to record raw data but fail&lt;/P&gt;&lt;P&gt;mx8_v4l2_cap_drm -cam 1 -d "/dev/video1" -fmt YUYV -ow 640 -oh 480 -of&lt;BR /&gt;(v4l2_setup_dev:1138): channel[0] VIDIOC_S_PARM failed ret = -1&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;So I check imx8-isi-cap.c and imx8-mipi-csi2.c&lt;/P&gt;&lt;P&gt;[ 15.784978] mxc_isi.0: is_entity_link_setup, No remote pad found!&lt;BR /&gt;[ 15.787546] --&amp;gt;mxc_get_remote_subdev&lt;BR /&gt;[ 15.793461] --&amp;gt;mxc_isi_cap_querycap&lt;BR /&gt;[ 15.793467] tp2850 tp2850_s_power#1686&lt;BR /&gt;[ 15.793482] --&amp;gt;mxc_isi_cap_querycap&lt;BR /&gt;[ 15.793495] --&amp;gt;mxc_isi_capture_release&lt;BR /&gt;[ 15.793496] --&amp;gt;mxc_get_remote_subdev&lt;BR /&gt;[ 15.793497] --&amp;gt;mxc_isi_get_remote_source_pad&lt;BR /&gt;[ 15.793501] tp2850 tp2850_s_power#1686&lt;BR /&gt;[ 15.793551] --&amp;gt;mxc_isi_capture_open&lt;BR /&gt;[ 15.797018] --&amp;gt;mxc_isi_get_remote_source_pad&lt;BR /&gt;[ 15.800638] --&amp;gt;is_entity_link_setup&lt;BR /&gt;[ 15.804373] tp2850 tp2850_s_power#1686&lt;BR /&gt;[ 15.807931] --&amp;gt;mxc_get_remote_subdev&lt;BR /&gt;[ 15.807934] --&amp;gt;mxc_isi_get_remote_source_pad&lt;BR /&gt;[ 15.807936] mxc_isi.0: is_entity_link_setup, No remote pad found!&lt;BR /&gt;[ 15.807975] --&amp;gt;mxc_isi_cap_querycap&lt;BR /&gt;[ 15.808089] --&amp;gt;mxc_isi_capture_release&lt;BR /&gt;[ 15.808091] --&amp;gt;mxc_isi_capture_release !isi_cap-&amp;gt;is_link_setup&lt;BR /&gt;[ 15.811896] --&amp;gt;mxc_isi_cap_querycap&lt;BR /&gt;[ 15.815547] --&amp;gt;mxc_isi_capture_release&lt;BR /&gt;[ 15.815549] --&amp;gt;mxc_isi_capture_release !isi_cap-&amp;gt;is_link_setup&lt;BR /&gt;[ 15.880522] --&amp;gt;mxc_isi_capture_release&lt;BR /&gt;[ 15.884415] --&amp;gt;mxc_get_remote_subdev&lt;BR /&gt;[ 15.889367] --&amp;gt;mxc_isi_get_remote_source_pad&lt;BR /&gt;[ 15.894748] tp2850 tp2850_s_power#1686&lt;BR /&gt;[ 15.899929] --&amp;gt;mxc_isi_capture_open&lt;BR /&gt;[ 15.903779] --&amp;gt;is_entity_link_setup&lt;BR /&gt;[ 15.909582] --&amp;gt;mxc_get_remote_subdev&lt;BR /&gt;[ 15.913436] --&amp;gt;mxc_isi_get_remote_source_pad&lt;BR /&gt;[ 15.918548] mxc_isi.0: is_entity_link_setup, No remote pad found!&lt;/P&gt;&lt;P&gt;mxc_isi.0 is mepty on my system, is this related to my tv driver fail?&lt;/P&gt;&lt;P&gt;Can anyone provide some advices?&lt;/P&gt;</description>
      <pubDate>Tue, 02 Mar 2021 11:25:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1238664#M104</guid>
      <dc:creator>simonlin</dc:creator>
      <dc:date>2021-03-02T11:25:46Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241303#M107</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760"&gt;@qiang_li-mpu_se&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have two tp2850 chips, they are registered as /dev/video0 and/dev/video1&lt;/P&gt;&lt;P&gt;[ 15.853112] mx8-img-md: Registered mxc_isi.0.capture as /dev/video0&lt;BR /&gt;[ 15.859435] --&amp;gt;mxc_isi_subdev_registered&lt;BR /&gt;[ 15.863462] --&amp;gt;mxc_isi_register_cap_device&lt;BR /&gt;[ 15.867664] --&amp;gt;mxc_isi_ctrls_create&lt;BR /&gt;[ 15.871343] mx8-img-md: Registered mxc_isi.1.capture as /dev/video1&lt;BR /&gt;[ 15.877711] mx8-img-md: Registered sensor subdevice: tp2850_mipi_0 2-0044 (1)&lt;BR /&gt;[ 15.884863] mx8-img-md: Registered sensor subdevice: tp28502_mipi_1 2-0045 (2)&lt;BR /&gt;[ 15.892155] --&amp;gt;mxc_isi_link_setup&lt;BR /&gt;[ 15.895590] mx8-img-md: created link [mxc_isi.0] =&amp;gt; [mxc_isi.0.capture]&lt;BR /&gt;[ 15.902238] --&amp;gt;mxc_isi_link_setup&lt;BR /&gt;[ 15.905656] mx8-img-md: created link [mxc-mipi-csi2.0] =&amp;gt; [mxc_isi.0]&lt;BR /&gt;[ 15.912113] --&amp;gt;mxc_isi_link_setup&lt;BR /&gt;[ 15.915555] mx8-img-md: created link [mxc_isi.1] =&amp;gt; [mxc_isi.1.capture]&lt;BR /&gt;[ 15.922223] --&amp;gt;mxc_isi_link_setup&lt;BR /&gt;[ 15.925663] mx8-img-md: created link [mxc-mipi-csi2.1] =&amp;gt; [mxc_isi.1]&lt;BR /&gt;[ 15.932146] usb 1-1: New USB device found, idVendor=0424, idProduct=2514, bcdDevice= b.b3&lt;BR /&gt;[ 15.932883] mx8-img-md: created link [tp2850_mipi_0 2-0044] =&amp;gt; [mxc-mipi-csi2.0]&lt;BR /&gt;[ 15.940343] usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0&lt;BR /&gt;[ 15.947765] mx8-img-md: created link [tp28502_mipi_1 2-0045] =&amp;gt; [mxc-mipi-csi2.1]&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here is my ISI register&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;[ 1151.809583] ISI CHNLC register dump, isi1&lt;BR /&gt;[ 1151.813603] CHNL_CTRL[0x00]: e0000001&lt;BR /&gt;[ 1151.818225] CHNL_IMG_CTRL[0x04]: 20000001&lt;BR /&gt;[ 1151.822850] CHNL_OUT_BUF_CTRL[0x08]: 70707&lt;BR /&gt;[ 1151.827211] CHNL_IMG_CFG[0x0c]: 1e002d0&lt;BR /&gt;[ 1151.831753] CHNL_IER[0x10]: 3cfc0000&lt;BR /&gt;[ 1151.839236] CHNL_STS[0x14]: 100&lt;BR /&gt;[ 1151.843431] CHNL_SCALE_FACTOR[0x18]: 10001000&lt;BR /&gt;[ 1151.848055] CHNL_SCALE_OFFSET[0x1c]: 00&lt;BR /&gt;[ 1151.852161] CHNL_CROP_ULC[0x20]: 00&lt;BR /&gt;[ 1151.856265] CHNL_CROP_LRC[0x24]: 00&lt;BR /&gt;[ 1151.860374] CHNL_CSC_COEFF0[0x28]: 00&lt;BR /&gt;[ 1151.867322] CHNL_CSC_COEFF1[0x2c]: 00&lt;BR /&gt;[ 1151.871426] CHNL_CSC_COEFF2[0x30]: 00&lt;BR /&gt;[ 1151.875526] CHNL_CSC_COEFF3[0x34]: 00&lt;BR /&gt;[ 1151.879636] CHNL_CSC_COEFF4[0x38]: 00&lt;BR /&gt;[ 1151.886589] CHNL_CSC_COEFF5[0x3c]: 00&lt;BR /&gt;[ 1151.893539] CHNL_ROI_0_ALPHA[0x40]: 00&lt;BR /&gt;[ 1151.897645] CHNL_ROI_0_ULC[0x44]: 00&lt;BR /&gt;[ 1151.904599] CHNL_ROI_0_LRC[0x48]: 00&lt;BR /&gt;[ 1151.908702] CHNL_ROI_1_ALPHA[0x4c]: 00&lt;BR /&gt;[ 1151.912825] CHNL_ROI_1_ULC[0x50]: 00&lt;BR /&gt;[ 1151.916930] CHNL_ROI_1_LRC[0x54]: 00&lt;BR /&gt;[ 1151.921035] CHNL_ROI_2_ALPHA[0x58]: 00&lt;BR /&gt;[ 1151.925135] CHNL_ROI_2_ULC[0x5c]: 00&lt;BR /&gt;[ 1151.929242] CHNL_ROI_2_LRC[0x60]: 00&lt;BR /&gt;[ 1151.936206] CHNL_ROI_3_ALPHA[0x64]: 00&lt;BR /&gt;[ 1151.940309] CHNL_ROI_3_ULC[0x68]: 00&lt;BR /&gt;[ 1151.944422] CHNL_ROI_3_LRC[0x6c]: 00&lt;BR /&gt;[ 1151.948532] CHNL_OUT_BUF1_ADDR_Y[0x70]: 00&lt;BR /&gt;[ 1151.952636] CHNL_OUT_BUF1_ADDR_U[0x74]: 00&lt;BR /&gt;[ 1151.956740] CHNL_OUT_BUF1_ADDR_V[0x78]: 00&lt;BR /&gt;[ 1151.963704] CHNL_OUT_BUF_PITCH[0x7c]: 5a0&lt;BR /&gt;[ 1151.970745] CHNL_IN_BUF_ADDR[0x80]: 00&lt;BR /&gt;[ 1151.977712] CHNL_IN_BUF_PITCH[0x84]: 00&lt;BR /&gt;[ 1151.981816] CHNL_MEM_RD_CTRL[0x88]: 00&lt;BR /&gt;[ 1151.985917] CHNL_OUT_BUF2_ADDR_Y[0x8c]: 00&lt;BR /&gt;[ 1151.990021] CHNL_OUT_BUF2_ADDR_U[0x90]: 00&lt;BR /&gt;[ 1151.994123 CHNL_OUT_BUF2_ADDR_V[0x94]: 00&lt;BR /&gt;[ 1151.998229] CHNL_SCL_IMG_CFG[0x98]: 1e002d0&lt;BR /&gt;[ 1152.002765] CHNL_FLOW_CTRL[0x9c]: 00&lt;/P&gt;&lt;P&gt;(v4l2_setup_dev:1084): channel[0] VIDIOC_S_PARM failed&lt;BR /&gt;(v4l2_setup_dev:1162): planes=1 WxH@fps = 720x480@30&lt;BR /&gt;(v4l2_create_buffer:1242): chanel[0] VIDIOC_REQBUFS failed ret = -1&lt;BR /&gt;(v4l2_device_prepare:1401): video_ch[0] create buffer fail&lt;BR /&gt;(media_device_prepare:1471): v4l2_device_prepare ret=-1&lt;/P&gt;&lt;P&gt;1156.432874] --- mipi_csis_s_stream ---&lt;BR /&gt;[ 1156.436624] CSIS_VERSION[0]: 0x03060301&lt;BR /&gt;[ 1156.441167] CSIS_CMN_CTRL[4]: 0x00004805&lt;BR /&gt;[ 1156.445705] CSIS_CLK_CTRL[8]: 0x000f0000&lt;BR /&gt;[ 1156.450243] CSIS_INTMSK[10]: 0x0fffff1f&lt;BR /&gt;[ 1156.454864] CSIS_INTSRC[14]: 0x00000000&lt;BR /&gt;[ 1156.459488] CSIS_DPHYSTATUS[20]: 0x000000e0&lt;BR /&gt;[ 1156.464110] CSIS_DPHYCTRL[24]: 0x00000003&lt;BR /&gt;[ 1156.468735] CSIS_DPHYBCTRL_L[30]: 0x000001f4&lt;BR /&gt;[ 1156.473355] CSIS_DPHYBCTRL_H[34]: 0x00000000&lt;BR /&gt;[ 1156.477980] CSIS_DPHYSCTRL_L[38]: 0x00000000&lt;BR /&gt;[ 1156.482600] CSIS_DPHYSCTRL_H[3c]: 0x00000000&lt;BR /&gt;[ 1156.487223] CSIS_ISPCONFIG_CH0[40]: 0x00001078&lt;BR /&gt;[ 1156.491846] CSIS_ISPCONFIG_CH1[50]: 0x000008fd&lt;BR /&gt;[ 1156.496471] CSIS_ISPCONFIG_CH2[60]: 0x000008fe&lt;BR /&gt;[ 1156.501091] CSIS_ISPCONFIG_CH3[70]: 0x000008ff&lt;BR /&gt;[ 1156.505728] CSIS_ISPRESOL_CH0[44]: 0x01e002d0&lt;BR /&gt;[ 1156.510349] CSIS_ISPRESOL_CH1[54]: 0x80008000&lt;BR /&gt;[ 1156.514979] CSIS_ISPRESOL_CH2[64]: 0x80008000&lt;BR /&gt;[ 1156.519599] CSIS_ISPRESOL_CH3[74]: 0x80008000&lt;BR /&gt;[ 1156.524226] CSIS_ISPSYNC_CH0[48]: 0x00000000&lt;BR /&gt;[ 1156.528848] CSIS_ISPSYNC_CH1[58]: 0x00000000&lt;BR /&gt;[ 1156.533473] CSIS_ISPSYNC_CH2[68]: 0x00000000&lt;BR /&gt;[ 1156.538093] CSIS_ISPSYNC_CH3[78]: 0x00000000&lt;BR /&gt;FMT fail&lt;BR /&gt;(v4l2_setup_dev:1084): channel[0] VIDIOC_S_PARM failed&lt;BR /&gt;(v4l2_setup_dev:1162): planes=1 WxH@fps = 720x480@30&lt;BR /&gt;[ 1156.547398] --&amp;gt;mxc_isi_cap_streamoff&lt;BR /&gt;[ 1156.553840] --&amp;gt;mxc_isi_pipeline_enable&lt;BR /&gt;[ 1156.574856] mxc_isi.1.capture is no v4l2 subdev&lt;/P&gt;&lt;P&gt;Finally I saw "mxc_isi.1.capture is no v4l2 subdev", but it should be registered as /dev/video1&lt;/P&gt;&lt;P&gt;Do you have any advices?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 06 Mar 2021 05:45:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241303#M107</guid>
      <dc:creator>simonlin</dc:creator>
      <dc:date>2021-03-06T05:45:21Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241512#M108</link>
      <description>&lt;P&gt;Device tree setting should be related to your issue.&lt;/P&gt;</description>
      <pubDate>Mon, 08 Mar 2021 05:56:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241512#M108</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2021-03-08T05:56:43Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241517#M109</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760"&gt;@qiang_li-mpu_se&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Here is my d&lt;SPAN&gt;evice tree setting&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks for your reply&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;tp2850_mipi_0: tp2850_mipi_0@44 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; compatible = "ovti,tp2850_mipi_0";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; reg = &amp;lt;0x44&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; pinctrl-names = "default";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_TVI1_IRQ&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //tv1_irq = &amp;lt;&amp;amp;gpio3 21 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_IPP_DO_CLKO2&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; clock-names = "csi_mclk";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_IPP_DO_CLKO2&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_CLK_24M&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; assigned-clock-rates = &amp;lt;24000000&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; csi_id = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; mipi_csi;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; mclk = &amp;lt;27000000&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; mclk_source = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //virtual-channel;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; interrupt-parent = &amp;lt;&amp;amp;gpio3&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; interrupts = &amp;lt;21 8&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = "okay";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; port {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; tp2850_mipi_0_ep: endpoint {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; remote-endpoint = &amp;lt;&amp;amp;mipi_csi0_ep&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; };&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;/P&gt;&lt;P&gt;};&lt;BR /&gt;&lt;BR /&gt;tp28502_mipi_1: tp28502_mipi_1@45 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; compatible = "ovti,tp28502_mipi_1";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; reg = &amp;lt;0x45&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; pinctrl-names = "default";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; pinctrl-0 = &amp;lt;&amp;amp;pinctrl_TVI2_IRQ&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //tv2_irq = &amp;lt;&amp;amp;gpio1 7 GPIO_ACTIVE_HIGH&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_IPP_DO_CLKO2&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; clock-names = "csi_mclk";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; assigned-clocks = &amp;lt;&amp;amp;clk IMX8MP_CLK_IPP_DO_CLKO2&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; assigned-clock-parents = &amp;lt;&amp;amp;clk IMX8MP_CLK_24M&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; assigned-clock-rates = &amp;lt;24000000&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; csi_id = &amp;lt;1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; mipi_csi;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; mclk = &amp;lt;27000000&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; mclk_source = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //virtual-channel;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; interrupt-parent = &amp;lt;&amp;amp;gpio1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; interrupts = &amp;lt;07 8&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = "okay";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; port {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; tp2850_mipi_1_ep: endpoint {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; remote-endpoint = &amp;lt;&amp;amp;mipi_csi1_ep&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; };&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;/P&gt;&lt;P&gt;};&lt;/P&gt;&lt;P&gt;pinctrl_TVI1_IRQ: TVI1_IRQ_grp {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; fsl,pins = &amp;lt;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0xd6&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;gt;;&lt;BR /&gt;};&lt;BR /&gt;pinctrl_TVI2_IRQ: TVI2_IRQ_grp {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; fsl,pins = &amp;lt;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0xd6&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;gt;;&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;mipi_csi_0 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //virtual-channel;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; port@0 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; mipi_csi0_ep: endpoint {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; remote-endpoint = &amp;lt;&amp;amp;tp2850_mipi_0_ep&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; data-lanes = &amp;lt;1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; //csis-hs-settle = &amp;lt;13&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; //csis-clk-settle = &amp;lt;2&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; //csis-wclk;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; };&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;mipi_csi_1 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; #address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; #size-cells = &amp;lt;0&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; //virtual-channel;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; port@1 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; reg = &amp;lt;1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; mipi_csi1_ep: endpoint {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; remote-endpoint = &amp;lt;&amp;amp;tp2850_mipi_1_ep&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; data-lanes = &amp;lt;1&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; //csis-hs-settle = &amp;lt;13&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; //csis-clk-settle = &amp;lt;2&amp;gt;;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; //csis-wclk;&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; };&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;isi_0 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; cap_device {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; status = "okay";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; m2m_device {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; status = "disabled";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;isi_1 {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; cap_device {&lt;BR /&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; status = "okay";&lt;BR /&gt;&amp;nbsp; &amp;nbsp; };&lt;BR /&gt;};&lt;/P&gt;</description>
      <pubDate>Mon, 08 Mar 2021 06:11:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241517#M109</guid>
      <dc:creator>simonlin</dc:creator>
      <dc:date>2021-03-08T06:11:44Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241546#M110</link>
      <description>&lt;P&gt;From the attached device tree, I can't find which I2C bus are the two TP2850 connected, and how about the hardware I2C connection for them?&lt;/P&gt;</description>
      <pubDate>Mon, 08 Mar 2021 07:03:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241546#M110</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2021-03-08T07:03:37Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241606#M111</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760"&gt;@qiang_li-mpu_se&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;My OS is&amp;nbsp;&lt;STRONG&gt;android10.0.0_2.6.0&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;I mount two TP2850 on &lt;STRONG&gt;I2C3&lt;/STRONG&gt; as attachment &lt;STRONG&gt;freescale.7z&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Hardware I2C connection is OK, I can read chip ID from register by I2C, log file as attachment &lt;STRONG&gt;teraterm_TP2850.7z&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;I also try&amp;nbsp;&lt;SPAN&gt;the test application "mx8_v4l2_cap_drm", but get ioctrl error&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#0000FF"&gt;mx8_v4l2_cap_drm -cam 1 -d "/dev/video1" -fmt YUYV -ow 640 -oh 480 -of.&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;(init_video_channel:497): init channel[0] save_file_name=0.YUYV&lt;BR /&gt;(init_video_channel:504): init channel[0] v4l2_dev_name=/dev/video1 w/h=(640,480)&lt;BR /&gt;(open_save_file:577): open 0.YUYV success&lt;BR /&gt;(open_v4l2_device:641): open /dev/video1 success&lt;BR /&gt;(v4l2_setup_dev:1071): get chip ident fail&lt;BR /&gt;(v4l2_enum_fmt:1021): index=0 pixelformat=RGBP&lt;BR /&gt;(v4l2_enum_fmt:1021): index=1 pixelformat=RGB3&lt;BR /&gt;(v4l2_enum_fmt:1021): index=2 pixelformat=BGR3&lt;BR /&gt;(v4l2_enum_fmt:1021): index=3 pixelformat=YUYV&lt;BR /&gt;(v4l2_enum_fmt:1021): index=4 pixelformat=YUV4&lt;BR /&gt;(v4l2_enum_fmt:1021): index=5 pixelformat=NV12&lt;BR /&gt;(v4l2_enum_fmt:1021): index=6 pixelformat=YM24&lt;BR /&gt;(v4l2_enum_fmt:1021): index=7 pixelformat=XR24&lt;BR /&gt;(v4l2_enum_fmt:1021): index=8 pixelformat=AR24&lt;BR /&gt;(v4l2_enum_fmt:1017): channel &lt;FONT color="#FF0000"&gt;&lt;STRONG&gt;VIDIOC_ENUM_FMT fail&lt;/STRONG&gt;&lt;/FONT&gt;&lt;BR /&gt;(v4l2_setup_dev:1084): channel[0]&lt;FONT color="#FF0000"&gt; &lt;STRONG&gt;VIDIOC_S_PARM failed&lt;/STRONG&gt;&lt;/FONT&gt;&lt;BR /&gt;(v4l2_setup_dev:1110): channel[0]&lt;STRONG&gt;&lt;FONT color="#FF0000"&gt; VIDIOC_S_FMT fail&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;(v4l2_device_prepare:1395): video_ch[0] setup fail&lt;BR /&gt;(media_device_prepare:1471): v4l2_device_prepare ret=-1&lt;/P&gt;&lt;P&gt;I provide imx8 isi files for reference as attachment &lt;STRONG&gt;imx.7z&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Mon, 08 Mar 2021 08:12:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1241606#M111</guid>
      <dc:creator>simonlin</dc:creator>
      <dc:date>2021-03-08T08:12:21Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1242076#M112</link>
      <description>&lt;P&gt;That means your tp2850 driver has issue.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 09 Mar 2021 02:14:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1242076#M112</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2021-03-09T02:14:07Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1246433#M115</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/4760"&gt;@qiang_li-mpu_se&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I take the ov5640.c for reference that in NXP bsp&amp;nbsp; , then modify TP2850&lt;/P&gt;&lt;P&gt;The ioctrl function work well&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I still try this command--&amp;gt;&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN&gt;mx8_v4l2_cap_drm -cam 1 -d "/dev/video1" -fmt YUYV -ow 640 -oh 480 -of&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;It show&amp;nbsp;&lt;STRONG&gt;&lt;FONT color="#FF0000"&gt;-EINVAL &lt;/FONT&gt;&lt;/STRONG&gt;&lt;FONT color="#000000"&gt;when run &lt;STRONG&gt;mxc_isi_update_buf_paddr&lt;/STRONG&gt;, because&amp;nbsp;&lt;STRONG&gt;memplanes is&lt;/STRONG&gt; &lt;STRONG&gt;0&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;But I check YUYV output format as below, the&amp;nbsp;&lt;STRONG&gt;memplanes should be 1&lt;/STRONG&gt;&lt;BR /&gt;&lt;/FONT&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;FONT color="#000000"&gt;&lt;BR /&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;.name = "YUYV-16",&lt;BR /&gt;.fourcc = V4L2_PIX_FMT_YUYV,&lt;BR /&gt;.depth = { 16 },&lt;BR /&gt;.color = MXC_ISI_OUT_FMT_YUV422_1P8P,&lt;BR /&gt;.&lt;STRONG&gt;memplanes = 1,&lt;/STRONG&gt;&lt;BR /&gt;.colplanes = 1,&lt;BR /&gt;.mbus_code = MEDIA_BUS_FMT_YUYV8_1X16,&lt;BR /&gt;}, &lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;Finally it run&amp;nbsp;mxc_isi_cap_streamon and start&amp;nbsp;capturing, but 0.YUYV file size is 0, I think it's releated above issue&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT color="#000000"&gt;Do you have any advice?&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;evk_8mp:/mnt/media_rw #&lt;BR /&gt;evk_8mp:/mnt/media_rw #&lt;BR /&gt;evk_8mp:/mnt/media_rw # [ 77.940546] read descriptors&lt;BR /&gt;[ 77.943451] read strings&lt;BR /&gt;[ 78.080191] healthd: battery l=85 v=3 t=35.0 h=2 st=2 c=400 fc=4000000 cc=32 chg=a&lt;BR /&gt;[ 78.243172] healthd: battery l=85 v=3 t=35.0 h=2 st=2 c=400 fc=4000000 cc=32 chg=a&lt;BR /&gt;x8_v4l2_cap_drm -cam 1 -d "/dev/video1" -fmt YUYV -ow 640 -oh 480 -of[ 78.988844] read descriptors&lt;BR /&gt;[ 78.991751] read strings&lt;/P&gt;&lt;P&gt;(init_video_channel:497): in[ 79.541820] --&amp;gt; mxc_isi_get_hostdata&lt;BR /&gt;[ 79.548227] ==&amp;gt; tp2850_s_power on = 1&lt;BR /&gt;[ 79.548230] tp2850 tp2850_check_stable_decoder#4045&lt;BR /&gt;it channel[0] save_file_name=0.YUYV&lt;BR /&gt;(init_video_channel:504): init channel[0] v4l2_dev_name=/dev/video1 w/h=(640,480)&lt;BR /&gt;(open_save_file:577): open 0.YUYV success&lt;/P&gt;&lt;P&gt;[ 83.474060] tp2850_init_controls ret = 0&lt;BR /&gt;[ 83.477994] ==&amp;gt; tp2850_set_power on = 1&lt;BR /&gt;[ 93.104696] mxc_isi_cap_enum_fmt&lt;BR /&gt;[ 93.111182] mxc_isi_cap_enum_fmt&lt;BR /&gt;(open_v4l2_device:641): [ 93.114438] mxc_isi_cap_enum_fmt&lt;BR /&gt;open /dev/video1 success&lt;BR /&gt;(v4[ 93.120520] mxc_isi_cap_enum_fmt&lt;BR /&gt;l2_enum_fmt:1021): index=0 p[ 93.126618] mxc_isi_cap_enum_fmt&lt;BR /&gt;ixelformat=RGBP&lt;BR /&gt;(v4l2_enum_f[ 93.132696] mxc_isi_cap_enum_fmt&lt;BR /&gt;mt:1021): index=1 pixelforma[ 93.138784] mxc_isi_cap_enum_fmt&lt;BR /&gt;[ 93.144863] mxc_isi_cap_enum_fmt&lt;BR /&gt;t=RGB3&lt;BR /&gt;(v4l2_enum_fmt:1021):[ 93.148118] mxc_isi_cap_enum_fmt&lt;BR /&gt;[ 93.154203] mxc_isi_cap_enum_fmt&lt;BR /&gt;index=2 pixelformat=BGR3&lt;BR /&gt;--&amp;gt; tp2850_s_frame_interval start&lt;BR /&gt;[ 93.164652] ==&amp;gt; tp2850_try_frame_interval start&lt;BR /&gt;[0m(v4l2_enum_fmt:1021): ind[ 93.164654] ==&amp;gt;fi-&amp;gt;numerator= 1&lt;BR /&gt;ex=3 pixelformat=YUYV&lt;BR /&gt;(v4l2_[ 93.169197] ==&amp;gt; tp2850_try_frame_interval best_fps=30&lt;BR /&gt;[ 93.175194] ==&amp;gt; tp2850_find_mode&lt;BR /&gt;[ 93.186419] ==&amp;gt; width = 640&lt;BR /&gt;[ 93.189223] ==&amp;gt; height = 480&lt;BR /&gt;[ 93.192110] ==&amp;gt; tp2850_try_frame_interval end&lt;BR /&gt;[ 93.192111] ==&amp;gt; tp2850_find_mode&lt;BR /&gt;[ 93.199696] ==&amp;gt; width = 640&lt;BR /&gt;[ 93.202499] ==&amp;gt; height = 480&lt;BR /&gt;[ 93.205397] --&amp;gt; tp2850_s_frame_interval end&lt;BR /&gt;enum_fmt:1021): index=4 pixe[ 93.209607] --&amp;gt;mxc_isi_cap_enum_framesizes&lt;BR /&gt;[ 93.216629] --&amp;gt;mxc_isi_find_format start&lt;BR /&gt;[ 93.220650] --&amp;gt; tp2850_enum_frame_size&lt;BR /&gt;lformat=YUV4&lt;BR /&gt;(v4l2_enum_fmt:[ 93.224406] --&amp;gt; fse-&amp;gt;min_width 176&lt;BR /&gt;1021): index=5 pixelformat=N[ 93.230673] --&amp;gt; fse-&amp;gt;max_height 144&lt;BR /&gt;V12&lt;BR /&gt;(v4l2_enum_fmt:1021): 93.237039] --&amp;gt;mxc_isi_cap_s_fmt_mplane&lt;BR /&gt;33mindex=6 pixelformat=YM24&lt;BR /&gt;[ 93.243800] mxc_isi_cap_s_fmt_mplane, fmt=0x56595559&lt;BR /&gt;(v4l2_enum_fmt:1021): index=[ 93.251617] format = YUYV&lt;BR /&gt;7 pixelformat=XR24&lt;BR /&gt;(v4l2_enu[ 93.257186] --&amp;gt;mxc_isi_cap_s_fmt_mplane i = 3&lt;BR /&gt;[ 93.264397] --&amp;gt;mxc_isi_cap_g_fmt_mplane&lt;BR /&gt;[ 93.268328] dst_f-&amp;gt;o_width= 640&lt;BR /&gt;m_fmt:1021): index=8 pixelfo[ 93.271466] dst_f-&amp;gt;o_height = 480&lt;BR /&gt;rmat=AR24&lt;BR /&gt;(v4l2_enum_fmt:101[ 93.277662] --&amp;gt; tp2850_g_frame_interval&lt;BR /&gt;7): channel VIDIOC_ENUM_FMT [ 93.284378] cap_vb2_queue_setup, buf_n=3, size=614400&lt;BR /&gt;fail&lt;BR /&gt;(adjust_width_height_for_one_sensor:1040): frmsiz[ 93.296521] --&amp;gt;cap_vb2_buffer_prepare start&lt;BR /&gt;[ 93.302093] cap_vb2_buffer_prepare&lt;BR /&gt;[ 93.305509] --&amp;gt;cap_vb2_buffer_prepare end&lt;BR /&gt;[ 93.309548] --&amp;gt;cap_vb2_buffer_prepare start&lt;BR /&gt;[ 93.313835] cap_vb2_buffer_prepare&lt;BR /&gt;[ 93.317245] --&amp;gt;cap_vb2_buffer_prepare end&lt;BR /&gt;[ 93.321269] --&amp;gt;cap_vb2_buffer_prepare start&lt;BR /&gt;[ 93.325547] cap_vb2_buffer_prepare&lt;BR /&gt;[ 93.328957] --&amp;gt;cap_vb2_buffer_prepare end&lt;BR /&gt;[ 93.332991] --&amp;gt; mxc_isi_get_hostdata&lt;BR /&gt;[ 93.336577] --&amp;gt;mxc_isi_cap_streamon&lt;BR /&gt;[ 93.340161] mxc_isi_cap_streamon&lt;BR /&gt;[ 93.343386] mxc_isi_cap_streamon 1063&lt;BR /&gt;[ 93.347057] --&amp;gt; mxc_isi_get_hostdata&lt;BR /&gt;[ 93.350638] --&amp;gt; mxc_isi_config_parm 1014&lt;BR /&gt;[ 93.354569] mxc_isi_source_fmt_init 874&lt;BR /&gt;[ 93.358410] mxc_isi_source_fmt_init 882&lt;BR /&gt;[ 93.362255] mxc_isi_source_fmt_init 888&lt;BR /&gt;[ 93.366097] @@@ mipi_csis_set_fmt 958&lt;BR /&gt;[ 93.369855] --&amp;gt; tp2850_set_fmt&lt;BR /&gt;[ 93.372914] --&amp;gt; tp2850_try_fmt_internal 111 fmt-&amp;gt;width = 640 fmt-&amp;gt;height = 480&lt;BR /&gt;[ 93.380406] ==&amp;gt; tp2850_find_mode&lt;BR /&gt;[ 93.383631] ==&amp;gt; width = 640&lt;BR /&gt;[ 93.386432] ==&amp;gt; height = 480&lt;BR /&gt;[ 93.389320] --&amp;gt; tp2850_try_fmt_internal 222 fmt-&amp;gt;width = 640 fmt-&amp;gt;height = 480&lt;BR /&gt;[ 93.396814] ==&amp;gt; tp2850_get_fmt&lt;BR /&gt;[ 93.396816] --&amp;gt;mxc_isi_get_src_fmt start&lt;BR /&gt;[ 93.403878] --&amp;gt;mxc_isi_get_src_fmt end index=1&lt;BR /&gt;e.discrete.width = 176&lt;BR /&gt;(adju[ 93.408332] mxc_isi_config_parm 1020&lt;BR /&gt;[ 93.414776] mxc_isi_channel_init&lt;BR /&gt;[ 93.418019] --&amp;gt;mxc_isi_channel_sw_reset&lt;BR /&gt;st_width_height_for_one_sensor:1041): frmsize.discrete.height[ 93.426949] mxc_isi_config_parm 1022&lt;BR /&gt;[ 93.431373] mxc_isi_channel_config&lt;BR /&gt;[ 93.434785] --&amp;gt;chain_buf&lt;BR /&gt;[ 93.437409] --&amp;gt;mxc_isi_channel_set_csc&lt;BR /&gt;[ 93.441254] bypass csc&lt;BR /&gt;[ 93.443612] input fmt YUV4&lt;BR /&gt;[ 93.446327] output fmt YUYV&lt;BR /&gt;[ 93.449127] --&amp;gt;mxc_isi_channel_set_scaling&lt;BR /&gt;[ 93.453319] --&amp;gt;mxc_isi_channel_clear_scaling&lt;BR /&gt;[ 93.457681] --&amp;gt;mxc_isi_channel_source_config&lt;BR /&gt;[ 93.462047] --&amp;gt;mxc_isi_channel_set_flip&lt;BR /&gt;[ 93.465976] --&amp;gt;mxc_isi_channel_set_alpha&lt;BR /&gt;[ 93.469994] --&amp;gt;mxc_isi_channel_set_panic_threshold&lt;BR /&gt;[ 93.474878] --&amp;gt;cap_vb2_buffer_queue start&lt;BR /&gt;[ 93.478898] &lt;STRONG&gt;isi_cap-&amp;gt;dst_f.fmt-&amp;gt;name = YUYV-16&lt;/STRONG&gt;&lt;BR /&gt;[ 93.483340] --&amp;gt;mxc_isi_update_buf_paddr start&lt;BR /&gt;[ 93.487694] --&amp;gt;&lt;STRONG&gt;mxc_isi_update_buf_paddr &lt;FONT color="#FF0000"&gt;-EINVAL&lt;/FONT&gt; memplanes 0&lt;/STRONG&gt;&lt;BR /&gt;[ 93.493280] --&amp;gt;cap_vb2_buffer_queue start&lt;BR /&gt;[ 93.497292]&lt;STRONG&gt; isi_cap-&amp;gt;dst_f.fmt-&amp;gt;name = YUYV-16&lt;/STRONG&gt;&lt;BR /&gt;[ 93.501733] --&amp;gt;mxc_isi_update_buf_paddr start&lt;BR /&gt;[ 93.506088] --&amp;gt;&lt;STRONG&gt;mxc_isi_update_buf_paddr &lt;FONT color="#FF0000"&gt;-EINVAL&lt;/FONT&gt; memplanes 0&lt;/STRONG&gt;&lt;BR /&gt;[ 93.511668] --&amp;gt;cap_vb2_buffer_queue start&lt;BR /&gt;[ 93.515679]&lt;STRONG&gt; isi_cap-&amp;gt;dst_f.fmt-&amp;gt;name = YUYV-16&lt;/STRONG&gt;&lt;BR /&gt;[ 93.520121] --&amp;gt;mxc_isi_update_buf_paddr start&lt;BR /&gt;[ 93.524477] --&amp;gt;&lt;STRONG&gt;mxc_isi_update_buf_paddr &lt;FONT color="#FF0000"&gt;-EINVAL&lt;/FONT&gt; memplanes 0&lt;/STRONG&gt;&lt;BR /&gt;= 144&lt;BR /&gt;(v4l2_setup_dev:1163)[ 93.530072] --&amp;gt; mxc_isi_get_hostdata&lt;BR /&gt;[ 93.536489] --&amp;gt;cap_vb2_start_streaming&lt;BR /&gt;: planes=1 WxH@fps = 640x4[ 93.540338] cap_vb2_start_streaming&lt;BR /&gt;80@30&lt;BR /&gt;(get_memory_map_info:1[ 93.548471] cap_vb2_start_streaming: num_plane=0 discard_size=614400 discard_buffer=00000000c52f3121&lt;BR /&gt;[ 93.558676] --&amp;gt;mxc_isi_channel_set_outbuf&lt;BR /&gt;[ 93.562772] --&amp;gt;mxc_isi_channel_set_outbuf&lt;BR /&gt;[ 93.566881] mxc_isi_cap_streamon 1070&lt;BR /&gt;[ 93.570548] --&amp;gt; mxc_isi_channel_enable&lt;BR /&gt;[ 93.574309] --&amp;gt;mxc_isi_clean_registers&lt;BR /&gt;[ 93.578149] --&amp;gt;mxc_isi_get_irq_status&lt;BR /&gt;[ 93.581909] --&amp;gt;mxc_isi_clean_irq_status&lt;BR /&gt;[ 93.585837] --&amp;gt; mxc_isi_enable_irq&lt;BR /&gt;[ 93.589251] --&amp;gt; dump_isi_regs&lt;BR /&gt;[ 93.592223] ISI CHNLC register dump, isi0&lt;BR /&gt;[ 93.596246] CHNL_CTRL[0x00]: e0000000&lt;BR /&gt;[ 93.600871] CHNL_IMG_CTRL[0x04]: 20000001&lt;BR /&gt;[ 93.605500] CHNL_OUT_BUF_CTRL[0x08]: 7c707&lt;BR /&gt;[ 93.609862] CHNL_IMG_CFG[0x0c]: 1e00280&lt;BR /&gt;[ 93.614405] CHNL_IER[0x10]: 3cfc0000&lt;BR /&gt;[ 93.619025] CHNL_STS[0x14]: 100&lt;BR /&gt;[ 93.623215] CHNL_SCALE_FACTOR[0x18]: 10001000&lt;BR /&gt;[ 93.627840] CHNL_SCALE_OFFSET[0x1c]: 00&lt;BR /&gt;[ 93.631945] CHNL_CROP_ULC[0x20]: 00&lt;BR /&gt;[ 93.636060] CHNL_CROP_LRC[0x24]: 00&lt;BR /&gt;[ 93.640165] CHNL_CSC_COEFF0[0x28]: 00&lt;BR /&gt;[ 93.644267] CHNL_CSC_COEFF1[0x2c]: 00&lt;BR /&gt;[ 93.648370] CHNL_CSC_COEFF2[0x30]: 00&lt;BR /&gt;[ 93.652470] CHNL_CSC_COEFF3[0x34]: 00&lt;BR /&gt;213): V4L2 buffer[0]-&amp;gt;planes[ 93.656577] CHNL_CSC_COEFF4[0x38]: 00&lt;BR /&gt;[0]:startAddr=0x0xe23d8be36000, o[ 93.663533] CHNL_CSC_COEFF5[0x3c]: 00&lt;BR /&gt;[ 93.670490] CHNL_ROI_0_ALPHA[0x40]: 00&lt;BR /&gt;[ 93.674592] CHNL_ROI_0_ULC[0x44]: 00&lt;BR /&gt;[ 93.678695] CHNL_ROI_0_LRC[0x48]: 00&lt;BR /&gt;[ 93.682799] CHNL_ROI_1_ALPHA[0x4c]: 00&lt;BR /&gt;[ 93.686909] CHNL_ROI_1_ULC[0x50]: 00&lt;BR /&gt;[ 93.691011] CHNL_ROI_1_LRC[0x54]: 00&lt;BR /&gt;[ 93.695115] CHNL_ROI_2_ALPHA[0x58]: 00&lt;BR /&gt;[ 93.699217] CHNL_ROI_2_ULC[0x5c]: 00&lt;BR /&gt;[ 93.703323] CHNL_ROI_2_LRC[0x60]: 00&lt;BR /&gt;[ 93.707430] CHNL_ROI_3_ALPHA[0x64]: 00&lt;BR /&gt;[ 93.711531] CHNL_ROI_3_ULC[0x68]: 00&lt;BR /&gt;[ 93.715637] CHNL_ROI_3_LRC[0x6c]: 00&lt;BR /&gt;[ 93.719738] CHNL_OUT_BUF1_ADDR_Y[0x70]: 73400000&lt;BR /&gt;[ 93.724364] CHNL_OUT_BUF1_ADDR_U[0x74]: 00&lt;BR /&gt;[ 93.728467] CHNL_OUT_BUF1_ADDR_V[0x78]: 00&lt;BR /&gt;[ 93.732572] CHNL_OUT_BUF_PITCH[0x7c]: 500&lt;BR /&gt;[ 93.736758] CHNL_IN_BUF_ADDR[0x80]: 00&lt;BR /&gt;[ 93.740873] CHNL_IN_BUF_PITCH[0x84]: 00&lt;BR /&gt;[ 93.744976] CHNL_MEM_RD_CTRL[0x88]: 00&lt;BR /&gt;[ 93.749082] CHNL_OUT_BUF2_ADDR_Y[0x8c]: 73100000&lt;BR /&gt;[ 93.753704] CHNL_OUT_BUF2_ADDR_U[0x90]: 00&lt;BR /&gt;[ 93.757808] CHNL_OUT_BUF2_ADDR_V[0x94]: 00&lt;BR /&gt;[ 93.761907] CHNL_SCL_IMG_CFG[0x98]: 1e00280&lt;BR /&gt;[ 93.766445] CHNL_FLOW_CTRL[0x9c]: 00&lt;BR /&gt;ffset=0x0, buf_size=614400&lt;BR /&gt;(get_memory_map_info:1213): V4L2 buffer[1]-&amp;gt;planes[0]:startAddr=0x0xe23d8a46d000, offset=0x96000, buf_size=614400&lt;BR /&gt;(get_memory_map_info:1213): V4L2 buffer[2]-&amp;gt;planes[0]:startAddr=0x0xe23d8a3d7000, offset=0x12c000, buf_size=614400&lt;BR /&gt;(v4l2_create_buffer:1255): channel[0] w/h=(640,480) alloc buffer success&lt;BR /&gt;(media_device_prepare:1472): v4l2_device_prepare ret=0&lt;BR /&gt;[ 93.952857] read descriptors&lt;BR /&gt;[ 93.955763] read strings&lt;BR /&gt;[ 94.092381] mxc_isi_cap_streamon 1072&lt;BR /&gt;[ 94.096070] mxc_isi_pipeline_enable start --&amp;gt; 1&lt;BR /&gt;[ 94.100631] --&amp;gt; tp2850_s_stream enable = 1&lt;BR /&gt;[ 94.104736] ==&amp;gt; tp2850_check_valid_mode&lt;BR /&gt;[ 94.104738] ==&amp;gt; tp2850_set_stream_mipi&lt;BR /&gt;[ 94.108583] ==&amp;gt; tp2850_write_reg&lt;BR /&gt;[ 94.114007] ==&amp;gt; tp2850_write_reg&lt;BR /&gt;[ 94.118853] ==&amp;gt; tp2850_write_reg&lt;BR /&gt;[ 94.228375] tp2850_set_stream_mipi ret= 0&lt;BR /&gt;[ 94.235716] tp2850_set_stream end enable 1&lt;BR /&gt;[ 94.256357] --- mipi_csis_s_stream ---&lt;BR /&gt;[ 94.260141] CSIS_VERSION[0]: 0x03060301&lt;BR /&gt;[ 94.264695] CSIS_CMN_CTRL[4]: 0x00004005&lt;BR /&gt;[ 94.269238] CSIS_CLK_CTRL[8]: 0x000f0000&lt;BR /&gt;[ 94.273787] CSIS_INTMSK[10]: 0x0fffff1f&lt;BR /&gt;[ 94.278415] CSIS_INTSRC[14]: 0x00000000&lt;BR /&gt;[ 94.283052] CSIS_DPHYSTATUS[20]: 0x000000e1&lt;BR /&gt;[ 94.287680] CSIS_DPHYCTRL[24]: 0x0d800003&lt;BR /&gt;[ 94.292314] CSIS_DPHYBCTRL_L[30]: 0x000001f4&lt;BR /&gt;[ 94.296947] CSIS_DPHYBCTRL_H[34]: 0x00000000&lt;BR /&gt;[ 94.301581] CSIS_DPHYSCTRL_L[38]: 0x00000000&lt;BR /&gt;[ 94.306220] CSIS_DPHYSCTRL_H[3c]: 0x00000000&lt;BR /&gt;[ 94.310856] CSIS_ISPCONFIG_CH0[40]: 0x00001078&lt;BR /&gt;[ 94.315483] CSIS_ISPCONFIG_CH1[50]: 0x000008fd&lt;BR /&gt;[ 94.320120] CSIS_ISPCONFIG_CH2[60]: 0x000008fe&lt;BR /&gt;[ 94.324751] CSIS_ISPCONFIG_CH3[70]: 0x000008ff&lt;BR /&gt;[ 94.329379] CSIS_ISPRESOL_CH0[44]: 0x01e00280&lt;BR /&gt;[ 94.334012] CSIS_ISPRESOL_CH1[54]: 0x80008000&lt;BR /&gt;[ 94.338645] CSIS_ISPRESOL_CH2[64]: 0x80008000&lt;BR /&gt;[ 94.343269] CSIS_ISPRESOL_CH3[74]: 0x80008000&lt;BR /&gt;[ 94.347894] CSIS_ISPSYNC_CH0[48]: 0x00000000&lt;BR /&gt;[ 94.352519] CSIS_ISPSYNC_CH1[58]: 0x00000000&lt;BR /&gt;[ 94.357146] CSIS_ISPSYNC_CH2[68]: 0x00000000&lt;BR /&gt;[ 94.361769] CSIS_ISPSYNC_CH3[78]: 0x00000000&lt;BR /&gt;[ 94.366405] --- mipi_csis_s_stream ---&lt;BR /&gt;[ 94.370163] GPR_GASKET_0_CTRL[60]: 0x00001e02&lt;BR /&gt;[ 94.374788] GPR_GASKET_0_HSIZE[64]: 0x00001e02&lt;BR /&gt;[ 94.379409] GPR_GASKET_0_VSIZE[68]: 0x00001e02&lt;BR /&gt;[ 94.388578] mxc_isi_cap_streamon 1074&lt;BR /&gt;(media_device_start:1517): v4l2_device_streamon start(v4l2_device_streamon:1434): channel[0] v4l_dev=0x4 start capturing&lt;BR /&gt;[ 94.997152] read descriptors&lt;BR /&gt;[ 95.000086] read strings&lt;BR /&gt;[ 96.036851] read descriptors&lt;BR /&gt;[ 96.039760] read strings&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 16 Mar 2021 12:37:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1246433#M115</guid>
      <dc:creator>simonlin</dc:creator>
      <dc:date>2021-03-16T12:37:50Z</dc:date>
    </item>
    <item>
      <title>Re: Post TP2850 driver on i.MX8M Plus</title>
      <link>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1246854#M116</link>
      <description>&lt;P&gt;"&lt;STRONG&gt;memplanes 0&lt;/STRONG&gt;" means no memory to use, so no video will be captured.&lt;/P&gt;</description>
      <pubDate>Wed, 17 Mar 2021 05:13:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Solutions/Post-TP2850-driver-on-i-MX8M-Plus/m-p/1246854#M116</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2021-03-17T05:13:17Z</dc:date>
    </item>
  </channel>
</rss>

