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    <title>topic Keeping the GPIO output level. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Keeping-the-GPIO-output-level/m-p/652756#M99914</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am debugging our custom board that used i.MX 6Solo.&lt;BR /&gt;I want to keep GPIO port level from before reset until after reset.&lt;BR /&gt;For example, EIM_A17 has been set to high level before reset and I want to keep until after reset.&lt;BR /&gt;I tried by the warm reset(watchdog reset) that, but level is not keep.&lt;BR /&gt;Is i.MX6 can this behavior?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;tomo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 06 Dec 2016 07:06:07 GMT</pubDate>
    <dc:creator>tomo</dc:creator>
    <dc:date>2016-12-06T07:06:07Z</dc:date>
    <item>
      <title>Keeping the GPIO output level.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Keeping-the-GPIO-output-level/m-p/652756#M99914</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am debugging our custom board that used i.MX 6Solo.&lt;BR /&gt;I want to keep GPIO port level from before reset until after reset.&lt;BR /&gt;For example, EIM_A17 has been set to high level before reset and I want to keep until after reset.&lt;BR /&gt;I tried by the warm reset(watchdog reset) that, but level is not keep.&lt;BR /&gt;Is i.MX6 can this behavior?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;tomo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Dec 2016 07:06:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Keeping-the-GPIO-output-level/m-p/652756#M99914</guid>
      <dc:creator>tomo</dc:creator>
      <dc:date>2016-12-06T07:06:07Z</dc:date>
    </item>
    <item>
      <title>Re: Keeping the GPIO output level.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Keeping-the-GPIO-output-level/m-p/652757#M99915</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tomo,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately once a reset is applied the GPIO (IOMUX cells) reset to the state defined in the datasheet, in most cases this will be an input, taken from the datasheet table -&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/12600i2AB1AB3849AFEA56/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you need a fixed high or low, you could use a pull resistor to set the level you need, but if you need to program a variable state and have that held during a reset sequence you will need to use an external latch to achieve this.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Ross&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 06 Dec 2016 13:36:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Keeping-the-GPIO-output-level/m-p/652757#M99915</guid>
      <dc:creator>RossMcLuckie</dc:creator>
      <dc:date>2016-12-06T13:36:20Z</dc:date>
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