ask help about IMX6Q/D PWM for LVDS backlight

dennyzhou — Mon, 02 Jan 2017 04:46:59 GMT

Hi NXP engineers,

We are using IMX6D/Q to drive a 7' LVDS&TS display, with resolution 1024x600. There is some problem about the PWM setting for the backlight. We use PWM3(SD1_DAT1) instead of the PWM1(SD1_DAT3). So we add some configuration data in 'imx6qdl-sabresd.dtsi'.

... ...

   pwm-backlight {
  compatible = "pwm-backlight";
  pwms = <&pwm3 0 50000>; //50us,20k
  brightness-levels = <
   0 /*1 2 3 4 5 6*/ 7 8 9
   10 11 12 13 14 15 16 17 18 19
   20 21 22 23 24 25 26 27 28 29
   30 31 32 33 34 35 36 37 38 39
   40 41 42 43 44 45 46 47 48 49
   50 51 52 53 54 55 56 57 58 59
   60 61 62 63 64 65 66 67 68 69
   70 71 72 73 74 75 76 77 78 79
   80 81 82 83 84 85 86 87 88 89
   90 91 92 93 94 95 96 97 98 99
   100
  >;
  default-brightness-level = <84>; //90, means 90% duty cycle
  status = "okay";

... ...

pinctrl_pwm3: pwm3grp {
   fsl,pins = <
    MX6QDL_PAD_SD1_DAT1__PWM3_OUT  0x1b0b1
   >;
  };

... ...

&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};

... ...

&ldb {
status = "okay";

lvds-channel@0 {
  fsl,data-mapping = "spwg";
  fsl,data-width = <24>; /*<24>;*/ /*<18>;*/ /*Row1->GP7',Row2->GP10.1',Row3->NXP*/
  primary;
  status = "okay";

  display-timings {
   native-mode = <&timing0>;
   timing0: hsd100pxn1 {
    clock-frequency = <51200000>; /*<71100000>;*/ /*<65000000>;*/
    hactive = <1024>; /*<1280>;*/ /*<1024>;*/
    vactive = <600>; /*<800>;*/ /*<768>;*/
    hback-porch = <80>; /*<40>;*/ /*<220>;*/
    hfront-porch = <80>; /*<40>;*/ /*<40>;*/
    vback-porch = <20>; /*<10>;*/ /*<21>;*/
    vfront-porch = <5>; /*<3>;*/ /*<7>;*/
    hsync-len = <160>; /*<80>;*/ /*<60>;*/
    vsync-len = <10>; /*<10>;*/ /*<10>;*/
   };
  };
};

Unfortunately, some interesting things happened,

1. The PWM will have an output with a 20Khz/50us, 45us for +width and 5us for -width firstly. But in a few minutes, It will change to another duty cycle, about 22us for + width and 28us for - width. I don't know the root cause. It seems this 22:28us duty cycle is a 'ghost' cycle. I have changed my configurtation to 10:90 but also PWM will also change to the 'ghost' cycle, 22:28, in a few minutes. And this 'ghost' cycle is also the one on PWM1 of demo board. Why?

2. Another thing, We add a Triode S8550 to reverse the PWM TTL. So I need to reverse the PWM output, by setting 0 for backlight ON while 1 for backlight OFF. How to setting the PWM3 by DTS?

3. The demo board is IMX6Q, we are using IMX6D, they are sharing 'imx6qdl-sabresd.dtsi'.

Currently, the display just light on for a frame and then the backlight will be OFF quickly. Anyone can help to give some commnmets?

Thanks

BR//Denny

Re: ask help about IMX6Q/D PWM for LVDS backlight

dennyzhou — Tue, 03 Jan 2017 14:28:39 GMT

Hi all,

I have fixed this case.

Actually, it is caused by a gpio controller to a power chip for LVDS, while not caused by the PWM. gpio6-15 is used here. We used hannstart_cabc function.

-----------------

hannstar_cabc {
  compatible = "hannstar,cabc";
  lvds0 {
   gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;

   cabc-enable;   //It is very important here. Or it will reverse the configuration.
  };
  lvds1 {
   gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
  };
};

----------------

And we have noticed that we should add a 'cabc-enable' here. Or the PIN will be set to LOW if you define ACTIVE_HIGH here. It is not easy to add it, as there is no reference to configure the hannstart_cabc. I just checked and found it in the source code of kernel. It is suggest that NXP could add some introduction in the txt file, to make it easy to user. :smileyhappy:

BR//Denny

Re: ask help about IMX6Q/D PWM for LVDS backlight

Carlos_Musich — Tue, 03 Jan 2017 16:31:51 GMT

Thank you for sharing Denny.

Regards,

Carlos

i.MX Processorsのトピックask help about IMX6Q/D PWM for LVDS backlight

ask help about IMX6Q/D PWM for LVDS backlight

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Re: ask help about IMX6Q/D PWM for LVDS backlight