i.MX Processors中的主题 Re: Question, i.MX6ULL power-up/down sequence

Question, i.MX6ULL power-up/down sequence

Aemj — Mon, 20 Feb 2017 04:50:03 GMT

Dear team,

I would like to ask about power-up/down sequence of i.MX6ULL.

Do you have any timing chart describing the power-up/down sequence of i.MX6ULL?

And my customer cannot find any description about the timing for NVCC_DRAM and NVCC_xxxx in i.MX6ULL datasheet.

Could you show me the power-up/down timing for NVCC_DRAM and NVCC_xxxx in addition to VDD_SNVS_IN and VDD_HIGH_IN?

Thanks,

Miyamoto

Yuri — Mon, 20 Feb 2017 07:52:37 GMT

Hello,

According to the i.MX6ULL Datasheet(s) :

- VDD_SNVS_IN supply must be turned on before any other power supply ;

- VDD_HIGH_IN should be turned on before VDD_SOC_IN.

No more restrictions.

Have a great day,

Yuri

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