topic Re: Regarding pin mapping for eSDHC2 and eCSPI1 in i.MX Processors

Regarding pin mapping for eSDHC2 and eCSPI1

surendrajadhav — Tue, 06 Dec 2016 07:31:51 GMT

Hi All,

We are using eSDHC2 interface for eMMC connection. However we need 4 SPI and 8 UART for our application which is restricting the use of all eSDHC2 pins from single block(out of three).

eSDHC2 eMMC interface is available on i.MX6UL CPU at three places(should be taken from any one).

To avoid pin conflict, I am taking few data lines from one block and few lines fron other two. Detailed pin assignment is given below:

Sr. No.	CPU Ball No.	Pin name(Alt function)
1	D8	usdhc2.CLK
2	C8	usdhc2.CMD
3	D7	usdhc2.DATA0
4	B7	usdhc2.DATA1
5	A7	usdhc2.DATA2
6	D6	usdhc2.DATA3
7	A12	usdhc2.DATA4
8	D3	usdhc2.DATA5
9	D2	usdhc2.DATA6
10	D1	usdhc2.DATA7
11	B4	usdhc1.RESET_B

In above table, if you see above assignment first 6 signals (from D8 to D6) are available closely while 7th one usdhc2.DATA4 (A12) is taken from other eSDHC2 interface and again last 4 signals( from D3 to B4) belongs to other eSDHC2 interface. Let me know is it allowed to take the signals like this. Even when I assigned these signals through Pin muxing tool it did not give any error or conflict. Attached is the eSDHC2 pin assignment in the tool.

> The same is happening for eCSPI1 interface where ecspi1.MOSI(A14) and ecspi1.MISO(B16) are closer and from same interface while remaining SPI pins like ECSPI1_SCLK(D4) and ecspi1.SS2(A10) are taken from other interface of eCSPI1. Again the question is same that is it allowed to do so and muxing tool did not return any error or conflict. Also let me know for eCSPI1 interface can we use SS2 as slave select rather than SS0 ( as SS0 is conflicting with other pin).

> In pin muxing tool we did not find any special interrupt pins. We need to assign four SPI interrupts. As there are no dedicated interrupt like for SPI interrupt, guide us which lines I can use for interrupt for SPI and other interrupt functions.

Regards,

Surendra

Re: Regarding pin mapping for eSDHC2 and eCSPI1

igorpadykov — Tue, 06 Dec 2016 09:13:34 GMT

Hi Surendra

yes this is allowable to have (as in attached png file)

eSDHC2 signals from different blocks: CSI,LCD,NAND. Please be

careful with power supplies for these modules (CSI,LCD,NAND) they

should be equal, please check how powered modules (and associated with

them signals) on i.MX6UL Datasheet (rev.1, 4/2016) Table 95. 14x14 mm Functional

Contact Assignments: column "Ball Name" and "Power Group"

http://cache.freescale.com/files/32bit/doc/data_sheet/IMX6ULCEC.pdf

For eCSPI module interrupts please check sect.20.7.5 Interrupt Control Register (ECSPIx_INTREG)

and Chapter 3 Interrupts and DMA Events i.MX6UL Reference Manual

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6ULRM.pdf

Best regards
igor
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Re: Regarding pin mapping for eSDHC2 and eCSPI1

surendrajadhav — Tue, 06 Dec 2016 10:24:24 GMT

Dear Igor,

Thanks a lot for your reply. Its helpful.

However I could not find the attachement you are referring to in email.

Regards,

Surendra