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    <title>topic Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649370#M99317</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I would suggest you to try U-Boot 2016.11 and post the issue at the U-Boot mailing list.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 16 Nov 2016 15:19:37 GMT</pubDate>
    <dc:creator>fabio_estevam</dc:creator>
    <dc:date>2016-11-16T15:19:37Z</dc:date>
    <item>
      <title>Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649366#M99313</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Guys,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I was successfull in getting Secure Boot running through u-boot-imx-2013 (&lt;A href="https://community.nxp.com/thread/428505"&gt;https://community.nxp.com/thread/428505&lt;/A&gt;&amp;nbsp;) and we recently moved to u-boot-denx-2015 for multi stage booting as we have read some reports about speed and effciency. Fortunately, we got the multi stage boot working. Now, we want to get the Secure Boot working also in this multi-stage booting. I am not sure this is the place to ask the current question but I am sure many people here can guide me here than else where. So, please bear with me.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Working - Normal Multi-stage Boot:&amp;nbsp;&lt;/STRONG&gt;This works like a charm&lt;/P&gt;&lt;P&gt;1. There are two main files SPL and u-boot.img&lt;/P&gt;&lt;P&gt;2. They are flashed onto the sd card&lt;/P&gt;&lt;P style="text-align: center;"&gt;&lt;STRONG&gt;sudo dd if=SPL of=/dev/sdc bs=1k seek=1&lt;/STRONG&gt;&lt;/P&gt;&lt;P style="text-align: center;"&gt;&lt;STRONG&gt;sudo dd if=u-boot.img of=/dev/sdc bs=1k seek=69&lt;/STRONG&gt;&lt;/P&gt;&lt;P style="text-align: left;"&gt;3. seek=1 which means 0x400 (1KB) is to be left free and SPL has to be flashed&amp;nbsp;&lt;/P&gt;&lt;P style="text-align: left;"&gt;4. seek=69 means that SPL cannot be great than 68KB. After that it is u-boot.img&lt;/P&gt;&lt;P style="text-align: left;"&gt;&lt;/P&gt;&lt;P style="text-align: left;"&gt;&lt;STRONG&gt;Not Working - Secure Multi-stage Boot:&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI style="text-align: left;"&gt;SPL is only 39936 Bytes (0x9C00) but devices like sd card and flash needs to be padded with 0x1000 (4KB). So, it is padded. 40960 Bytes (0xA000) is the new size.&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPLandPad.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9569iC0672D24234E1D39/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPLandPad.png" alt="SPLandPad.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI style="text-align: left;"&gt;SPL hexdump looks like this SPL &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPL-pad-hexdump.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9522i35943A2297E255D6/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPL-pad-hexdump.png" alt="SPL-pad-hexdump.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI style="text-align: left;"&gt;The SPL starts with IVT and therefore the Authenticate data of CSF file is as follows&lt;span class="lia-inline-image-display-wrapper" image-alt="CSF-Authenticate.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9607i11853311A4724D91/image-size/large?v=v2&amp;amp;px=999" role="button" title="CSF-Authenticate.png" alt="CSF-Authenticate.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI style="text-align: left;"&gt;The CSF bin generated by CST is added to SPL.pad to generate SPL-signed.bin. This SPL-signed.bin is further padded to the size 0x1000 &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPL-signed-pad.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/9649i3F54635AD552B9FF/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPL-signed-pad.png" alt="SPL-signed-pad.png" /&gt;&lt;/span&gt;&lt;/LI&gt;&lt;LI style="text-align: left;"&gt;I flashed the new SPL-signed.bin.pad and u-boot.img as in the Normal Multi-stage boot. Unfortunately it doesnt work.&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Questions?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Is there any mistake in my above process to get secure boot running?&lt;/LI&gt;&lt;LI&gt;I only sign the &lt;STRONG&gt;SPL&lt;/STRONG&gt; image and not &lt;STRONG&gt;u-boot.img&lt;/STRONG&gt; as I assume that the ROM only check the first part of the boot loader which is SPL in the current case. Is this wrong?&lt;/LI&gt;&lt;LI&gt;How do I know at what RAM address is the u-boot.img is loaded to? Where in the code could that be written?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Ask me anything for more info, I would be happy to receive help from you guys.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Greets,&lt;/P&gt;&lt;P&gt;Satya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Nov 2016 10:58:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649366#M99313</guid>
      <dc:creator>satyadamarla</dc:creator>
      <dc:date>2016-11-10T10:58:12Z</dc:date>
    </item>
    <item>
      <title>Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649367#M99314</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Satya&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for u-boot-denx-2015 issues one can post on meta-fsl-arm mailing list or uboot mail&lt;BR /&gt;list, so that someone familiar with that version could try to assist you.&lt;BR /&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Flists.yoctoproject.org%2Flistinfo%2Fmeta-freescale" rel="nofollow" target="_blank"&gt;https://lists.yoctoproject.org/listinfo/meta-freescale&lt;/A&gt;&lt;BR /&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Flists.denx.de%2Fmailman%2Flistinfo%2Fu-boot" rel="nofollow" target="_blank"&gt;http://lists.denx.de/mailman/listinfo/u-boot&lt;/A&gt;&lt;BR /&gt;alternatively one can try uboot-imx which is supported in nxp official bsps (note spl is not&lt;BR /&gt;used in nxp versions).&lt;BR /&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fgit.freescale.com%2Fgit%2Fcgit.cgi%2Fimx%2Fuboot-imx.git%2Ftree%2F%3Fh%3Dimx_v2015.04_4.1.15_1.0.0_ga" rel="nofollow" target="_blank"&gt;http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/?h=imx_v2015.04_4.1.15_1.0.0_ga&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 12 Nov 2016 01:49:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649367#M99314</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-11-12T01:49:27Z</dc:date>
    </item>
    <item>
      <title>Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649368#M99315</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Please check this series posted recently in the U-Boot mailing list:&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://lists.denx.de/pipermail/u-boot/2016-November/271971.html" title="http://lists.denx.de/pipermail/u-boot/2016-November/271971.html"&gt;[U-Boot] [PATCH 0/5] arm: imx6: Enable Secure Boot (HAB) with SPL Builds&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 12 Nov 2016 13:07:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649368#M99315</guid>
      <dc:creator>fabio_estevam</dc:creator>
      <dc:date>2016-11-12T13:07:55Z</dc:date>
    </item>
    <item>
      <title>Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649369#M99316</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="padding: 0px;"&gt;Hello Fabio, Hello Igor&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;Thanks for the link. I had a look deeply into the link and it has nothing to do with my problem. The patches in the link are for&amp;nbsp;SPL (1st stage bootloader) to authenticate u-boot.img (2nd stage bootloader). On the other hand, my problem is with ROM Boot authenticating the SPL. This is one step before and had to do with the way ROM Boot authenticates the 1st image, i.e. SPL&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;My SPL.imx is as follows&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPL-imx.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/11807iA7290D5ACCE2EE11/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPL-imx.png" alt="SPL-imx.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;The HAB error is&amp;nbsp;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPL+U-Booot+HAB.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/11845i1A0B1B5862DBA9ED/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPL+U-Booot+HAB.png" alt="SPL+U-Booot+HAB.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;It's actually at DCD data. The error means the following&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;0x33 - failure&lt;/P&gt;&lt;P style="padding: 0px;"&gt;0x06 - Invalid Command - command malformed&lt;/P&gt;&lt;P style="padding: 0px;"&gt;0xC0 - Error occured while executing CSF or DCD, in our case DCD&lt;/P&gt;&lt;P style="padding: 0px;"&gt;0x00 - Any Engine&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;Data - "CC 00 04 04" which means&lt;/P&gt;&lt;P style="padding: 0px;"&gt;CC - Write Data&lt;/P&gt;&lt;P style="padding: 0px;"&gt;00 04 - Length of DCD which is 4 Bytes&lt;/P&gt;&lt;P style="padding: 0px;"&gt;04 - Width of addresses which is 32bit or 4 Bytes.&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;Can you guys tell me why this occurs? Is it a mistake that the length of DCD data is only 4 Bytes and the rest is empty? Did &amp;nbsp;any one check their SPL's DCD data?&lt;/P&gt;&lt;P style="padding: 0px;"&gt;&lt;/P&gt;&lt;P style="padding: 0px;"&gt;Greets,&lt;/P&gt;&lt;P style="padding: 0px;"&gt;Satya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Nov 2016 13:42:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649369#M99316</guid>
      <dc:creator>satyadamarla</dc:creator>
      <dc:date>2016-11-16T13:42:05Z</dc:date>
    </item>
    <item>
      <title>Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649370#M99317</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I would suggest you to try U-Boot 2016.11 and post the issue at the U-Boot mailing list.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 16 Nov 2016 15:19:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649370#M99317</guid>
      <dc:creator>fabio_estevam</dc:creator>
      <dc:date>2016-11-16T15:19:37Z</dc:date>
    </item>
    <item>
      <title>Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649371#M99318</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Everyone,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I solved it through a contributor to u-boot, Sven Ebenfeld.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Solution:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Change the DCD address in IVT to 0x0. For the moment I just hacked it using hex editor but this has to be changed in the code. That means my new SPL.imx looks as follows&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="SPL-imx.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/8762i73D3FC7C1B380450/image-size/large?v=v2&amp;amp;px=999" role="button" title="SPL-imx.png" alt="SPL-imx.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Output:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="HAB-Success.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/8785i040F4CE2964549CE/image-size/large?v=v2&amp;amp;px=999" role="button" title="HAB-Success.png" alt="HAB-Success.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Why did it work? Possible Explanation:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;DCD is actually information about initialising RAM which I assume is done by the firmware part, the second stage of bootloader (u-boot.img). So, there is no necessity of it being mentioned in the IVT data structure. So, changing DCD address to 0x0 doesn't effect the booting in any way.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Greets &amp;amp; Thanks,&lt;/P&gt;&lt;P&gt;Satya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 17 Nov 2016 09:13:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649371#M99318</guid>
      <dc:creator>satyadamarla</dc:creator>
      <dc:date>2016-11-17T09:13:02Z</dc:date>
    </item>
    <item>
      <title>Re: Multi-stage Secure Boot in iMX6 through SPL &amp; u-boot.img</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649372#M99319</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Satya,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; I notice that&amp;nbsp;you have finished&amp;nbsp;&lt;STRONG&gt;Normal Multi-stage Boot&lt;/STRONG&gt;, could you help me to answer my question:&amp;nbsp;&lt;A _jive_internal="true" href="https://community.nxp.com/message/864563"&gt;https://community.nxp.com/message/864563&lt;/A&gt;. Thanks.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best wishes,&lt;/P&gt;&lt;P&gt;Mc&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Jan 2017 09:01:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multi-stage-Secure-Boot-in-iMX6-through-SPL-u-boot-img/m-p/649372#M99319</guid>
      <dc:creator>mach</dc:creator>
      <dc:date>2017-01-03T09:01:30Z</dc:date>
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