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    <title>topic iMX6SX QSPI not work in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-QSPI-not-work/m-p/648847#M99196</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I start to implement vxWorks QSPI driver based on Freescale iMX6SX SABRE-SDB. But no response from flash chip.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Register setting about IOMUX:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_WP_B (20E_017Ch) = 2,&amp;nbsp;Select signal QSPI2A_DATA0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_READY_B (20E_0174h) = 2,&amp;nbsp;Select signal QSPI2A_DATA1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;3.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_CE0_B (20E_0144h) = 2,&amp;nbsp;Select signal QSPI2A_DATA2&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;4.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_CE1_B (20E_0148h) = 2,&amp;nbsp;Select signal QSPI2A_DATA3&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;5.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_CLE (20E_014Ch) = 2,&amp;nbsp;Select signal QSPI2A_SCLK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;6.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_ALE (20E_0140h) = 2,&amp;nbsp;Select signal QSPI2A_SS0_B&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;7.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_WP_B (20E_04C4h) =&amp;nbsp;0x70a1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;8.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_READY_B (20E_04BCh)&amp;nbsp;=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;9.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_CE0_B (20E_048Ch)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;10.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_CE1_B (20E_0490h)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;11.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_CLE (20E_0494h)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;12.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_ALE (20E_0488h)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;Same settings for QSPI2B.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Register setting about QSPI clocks:&lt;/P&gt;&lt;P&gt;1. CCM_CS2CDR (20C_402Ch):&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;qspi2_clk_sel = 3,&amp;nbsp;derive clock from PLL2 PFD2.&amp;nbsp;PLL2 PFD2 is 396MHz.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;qspi2_clk_pred = 1,&amp;nbsp;divide by 2&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;qspi2_clk_podf = 0,&amp;nbsp;divide by 1.&lt;/P&gt;&lt;P&gt;So&amp;nbsp;QSPI2_CLK_ROOT is 396/2 = 198 MHz.&lt;/P&gt;&lt;P&gt;2.&amp;nbsp;CCM_CCGR4 (20C_4078h):&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;CG5 = 3,&amp;nbsp;qspi2 clock (qspi2_clk_enable)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Send "READ ID" (9Fh) command to flash chip, get all FFh data from flash. During reading, no clock signal is found on flash chip 'C' pin (measured on TP123 -&amp;nbsp;QSPI2A_SCLK). After the command issue, QSPI interrupt generates,&amp;nbsp;QSPI_FR = 8000001h.&lt;/P&gt;&lt;P&gt;What register save the value of QSPI_AMBA_BASE?&lt;/P&gt;&lt;P&gt;vxWorks QSPI driver works fine on Freescale vf610 tower board (TWR-VF65GS10). Porting it to iMX6sx, it can't work. Are there differences between their QSPI controllers? What is wrong? &amp;nbsp;Can you send me QSPI driver sample code?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miles&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 29 Dec 2016 08:32:29 GMT</pubDate>
    <dc:creator>mileswang</dc:creator>
    <dc:date>2016-12-29T08:32:29Z</dc:date>
    <item>
      <title>iMX6SX QSPI not work</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-QSPI-not-work/m-p/648847#M99196</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I start to implement vxWorks QSPI driver based on Freescale iMX6SX SABRE-SDB. But no response from flash chip.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Register setting about IOMUX:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;1.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_WP_B (20E_017Ch) = 2,&amp;nbsp;Select signal QSPI2A_DATA0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;2.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_READY_B (20E_0174h) = 2,&amp;nbsp;Select signal QSPI2A_DATA1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;3.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_CE0_B (20E_0144h) = 2,&amp;nbsp;Select signal QSPI2A_DATA2&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;4.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_CE1_B (20E_0148h) = 2,&amp;nbsp;Select signal QSPI2A_DATA3&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;5.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_CLE (20E_014Ch) = 2,&amp;nbsp;Select signal QSPI2A_SCLK&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;6.&amp;nbsp;IOMUXC_SW_MUX_CTL_PAD_NAND_ALE (20E_0140h) = 2,&amp;nbsp;Select signal QSPI2A_SS0_B&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;7.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_WP_B (20E_04C4h) =&amp;nbsp;0x70a1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;8.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_READY_B (20E_04BCh)&amp;nbsp;=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;9.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_CE0_B (20E_048Ch)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;10.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_CE1_B (20E_0490h)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;11.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_CLE (20E_0494h)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;12.&amp;nbsp;IOMUXC_SW_PAD_CTL_PAD_NAND_ALE (20E_0488h)=&amp;nbsp;&lt;SPAN&gt;0x70a1&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;Same settings for QSPI2B.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Register setting about QSPI clocks:&lt;/P&gt;&lt;P&gt;1. CCM_CS2CDR (20C_402Ch):&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;qspi2_clk_sel = 3,&amp;nbsp;derive clock from PLL2 PFD2.&amp;nbsp;PLL2 PFD2 is 396MHz.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;qspi2_clk_pred = 1,&amp;nbsp;divide by 2&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;qspi2_clk_podf = 0,&amp;nbsp;divide by 1.&lt;/P&gt;&lt;P&gt;So&amp;nbsp;QSPI2_CLK_ROOT is 396/2 = 198 MHz.&lt;/P&gt;&lt;P&gt;2.&amp;nbsp;CCM_CCGR4 (20C_4078h):&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;&amp;nbsp;CG5 = 3,&amp;nbsp;qspi2 clock (qspi2_clk_enable)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Send "READ ID" (9Fh) command to flash chip, get all FFh data from flash. During reading, no clock signal is found on flash chip 'C' pin (measured on TP123 -&amp;nbsp;QSPI2A_SCLK). After the command issue, QSPI interrupt generates,&amp;nbsp;QSPI_FR = 8000001h.&lt;/P&gt;&lt;P&gt;What register save the value of QSPI_AMBA_BASE?&lt;/P&gt;&lt;P&gt;vxWorks QSPI driver works fine on Freescale vf610 tower board (TWR-VF65GS10). Porting it to iMX6sx, it can't work. Are there differences between their QSPI controllers? What is wrong? &amp;nbsp;Can you send me QSPI driver sample code?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Miles&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 29 Dec 2016 08:32:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-QSPI-not-work/m-p/648847#M99196</guid>
      <dc:creator>mileswang</dc:creator>
      <dc:date>2016-12-29T08:32:29Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6SX QSPI not work</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-QSPI-not-work/m-p/648848#M99197</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Miles&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;for qspi example one can check uboot_imx_v2015.04 ( ..mx6sxsabresd/mx6sxsabresd.c)&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx6sxsabresd/mx6sxsabresd.c?h=imx_v2015.04_4.1.15_1.0.0_ga" title="http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/tree/board/freescale/mx6sxsabresd/mx6sxsabresd.c?h=imx_v2015.04_4.1.15_1.0.0_ga"&gt;uboot-imx.git - Freescale i.MX u-boot Tree&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;also please check attached Linux Guide from Documentation package&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://www.nxp.com/webapp/Download?colCode=L4.1.15_1.0.0_LINUX_DOCS&amp;amp;Parent_nodeId=1337699481071706174845&amp;amp;Parent_pageType=product" title="http://www.nxp.com/webapp/Download?colCode=L4.1.15_1.0.0_LINUX_DOCS&amp;amp;Parent_nodeId=1337699481071706174845&amp;amp;Parent_pageType=product"&gt;http://www.nxp.com/webapp/Download?colCode=L4.1.15_1.0.0_LINUX_DOCS&amp;amp;Parent_nodeId=1337699481071706174845&amp;amp;Parent_pageType…&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;or FreeRTOS example , refer to attached User Guide Chapter 6 Hello World QSPI Demo&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/webapp/sps/download/license.jsp?colCode=FREERTOS_MX6SX_1.0.0_LINUX&amp;amp;appType=file1&amp;amp;location=null&amp;amp;DOWNLOAD_ID=null" title="https://www.nxp.com/webapp/sps/download/license.jsp?colCode=FREERTOS_MX6SX_1.0.0_LINUX&amp;amp;appType=file1&amp;amp;location=null&amp;amp;DOWNLOAD_ID=null"&gt;FreeRTOS_MX6SX_1.0.0_LINUX&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 30 Dec 2016 08:08:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SX-QSPI-not-work/m-p/648848#M99197</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-12-30T08:08:53Z</dc:date>
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