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    <title>i.MX Processorsのトピック32Khz clock on CCM_CLKO2 (SD1_WP)</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648256#M99084</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to get 32Khz on CCM_CLKO2.&amp;nbsp;&lt;/P&gt;&lt;P&gt;CCM_CLKO2 is connected to SD1_WP of IMX7D .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My question is..how to write the device tree to generate 32khz clock on CCM_CLKO2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Surya&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 28 Apr 2017 11:05:37 GMT</pubDate>
    <dc:creator>suryapradhan</dc:creator>
    <dc:date>2017-04-28T11:05:37Z</dc:date>
    <item>
      <title>32Khz clock on CCM_CLKO2 (SD1_WP)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648256#M99084</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to get 32Khz on CCM_CLKO2.&amp;nbsp;&lt;/P&gt;&lt;P&gt;CCM_CLKO2 is connected to SD1_WP of IMX7D .&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My question is..how to write the device tree to generate 32khz clock on CCM_CLKO2.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Surya&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Apr 2017 11:05:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648256#M99084</guid>
      <dc:creator>suryapradhan</dc:creator>
      <dc:date>2017-04-28T11:05:37Z</dc:date>
    </item>
    <item>
      <title>Re: 32Khz clock on CCM_CLKO2 (SD1_WP)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648257#M99085</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi surya,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As you may know each pin on i.MX devices has up to 8 potential functions, and on the other side, one function can be available in different pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I assume you are aware that&amp;nbsp; CCM_CLKO2 can be mapped to 2 output pins.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17302i0DE16755E81443CF/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Well, you must configure one of these output pins to take CCM_CLKO2 functionality. E.g.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17352iBFB3C7EC8F65ECF8/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You need to do this through the Device Tree (dts file).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The Device Tree is a data structure for describing hardware that is passed to the operating system at boot time. The data structure can hold any kind of data as internally it is a tree of named nodes and properties. Nodes contain properties and child nodes, while properties are name–value pairs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Example:&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000080;"&gt;pinctrl_uart2: uart2grp { &amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; fsl,pins = &amp;lt; &amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D26__UART2_TX_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x1b0b1 &amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; MX6QDL_PAD_EIM_D27__UART2_RX_DATA&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x1b0b1 &amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;gt;; &amp;nbsp;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #000080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; };&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, how to configure what you need?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1) In the IO Pinmux chapter of Reference Manual you can find following registers:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;IOMUXC_SW_MUX_CTL_PAD_&amp;lt;xxx&amp;gt;&lt;/STRONG&gt;&lt;/EM&gt; which indicates the mux function associated with the pin&amp;nbsp;&lt;BR /&gt;&lt;EM&gt;&lt;STRONG&gt;IOMUXC_SW_PAD_CTL_PAD_&amp;lt;xxx&amp;gt;&lt;/STRONG&gt;&lt;/EM&gt; that is responsible for configuring the physical drive characteristic of the pin, which could be mapped to any of the pin functions.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here &amp;lt;xxx&amp;gt; is the corresponding pin name.&lt;/P&gt;&lt;P&gt;In the example above the Hex number indicates the value of &lt;EM&gt;&lt;STRONG&gt;IOMUXC_SW_PAD_CTL_PAD_&amp;lt;xxx&amp;gt;&lt;/STRONG&gt;&lt;/EM&gt;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;2) Somewhere in you build directory you will find a file named &lt;STRONG&gt;&lt;EM&gt;imx6q-pinfuc.h &lt;/EM&gt;&lt;/STRONG&gt;here you will find macros with the following format:&lt;/P&gt;&lt;P&gt;&amp;lt;device&amp;gt;_PAD_&amp;lt;pin name&amp;gt;__&amp;lt;function&amp;gt; (please note double underscore between pin name and function)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In the example above the macro indicates the value of &lt;EM&gt;&lt;STRONG&gt;IOMUXC_SW_MUX_CTL_PAD_&amp;lt;xxx&amp;gt;&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3) Finally just write/modify the appropriate node in the device tree with the appropriate macro and the desired pin characteristics&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For more information about Device Tree and IO pins config you can see the following links:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.kosagi.com/w/index.php?title=Definitive_GPIO_guide" title="https://www.kosagi.com/w/index.php?title=Definitive_GPIO_guide"&gt;Definitive GPIO guide - Studio Kousagi Wiki&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://saurabhsengarblog.wordpress.com/2015/11/28/device-tree-tutorial-arm/" title="https://saurabhsengarblog.wordpress.com/2015/11/28/device-tree-tutorial-arm/"&gt;Device Tree Tutorial (ARM) | Linux Kernel For Newbies&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-104818"&gt;Device Tree Made Easy&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://events.linuxfoundation.org/sites/events/files/slides/petazzoni-device-tree-dummies.pdf" title="https://events.linuxfoundation.org/sites/events/files/slides/petazzoni-device-tree-dummies.pdf"&gt;https://events.linuxfoundation.org/sites/events/files/slides/petazzoni-device-tree-dummies.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 May 2017 17:25:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648257#M99085</guid>
      <dc:creator>Carlos_Musich</dc:creator>
      <dc:date>2017-05-02T17:25:45Z</dc:date>
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      <title>Re: 32Khz clock on CCM_CLKO2 (SD1_WP)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648258#M99086</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Carlos,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the reply.&lt;/P&gt;&lt;P&gt;As per your instruction, i have muxed CCM_CLKO2 to sd1_wp in device tree.&lt;/P&gt;&lt;P&gt;"MX7D_PAD_SD1_WP__CCM_CLKO2 &amp;nbsp; &amp;nbsp; &amp;nbsp;0x14".&lt;/P&gt;&lt;P&gt;Now, i got 24Mhz clock on the CCM_CLKO2 . But my requirement is to get 32Khz.&lt;/P&gt;&lt;P&gt;&amp;nbsp;The file need to be modified is "arch/arm/mach-imx/clk-imx7d.c".&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; regards&lt;/P&gt;&lt;P&gt;Surya&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Jun 2017 09:27:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648258#M99086</guid>
      <dc:creator>suryapradhan</dc:creator>
      <dc:date>2017-06-13T09:27:58Z</dc:date>
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      <title>Re: 32Khz clock on CCM_CLKO2 (SD1_WP)</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648259#M99087</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Answer here:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/453338"&gt;32Khz output on CCM_CLKO2 pin of imx7&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;Carlos&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Jun 2017 19:31:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/32Khz-clock-on-CCM-CLKO2-SD1-WP/m-p/648259#M99087</guid>
      <dc:creator>Carlos_Musich</dc:creator>
      <dc:date>2017-06-13T19:31:24Z</dc:date>
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