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    <title>i.MX Processors中的主题 Re: SDMA</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644821#M98429</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I think it makes sense to look at SDMA example of the i.MX6 Platform SDK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 26 Apr 2017 08:34:33 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2017-04-26T08:34:33Z</dc:date>
    <item>
      <title>SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644820#M98428</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have a question about SDMA memory map.&lt;/P&gt;&lt;P&gt;1. Regarding the SDMA internal registers, it is described 'SDMA Internal Registers (scheduler, OnCE, and registers that are also accessible by the ARM platform).&lt;/P&gt;&lt;P&gt;&amp;nbsp;=&amp;gt;How to access these registers from ARM platform? Is it possible to access by JTAG?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.&amp;nbsp; Regarding to SDMA internal&amp;nbsp;memmory map in 55.10 SDMA Internal (Core) Memory Map and Internal Register Definitions&lt;/P&gt;&lt;P&gt;&amp;nbsp;=&amp;gt; That (SDMACORE memory map) addressing is 16 bit addressing, but ARM addressing (SDMAARM memory map) is 32bit addressig. How related these registers address?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sugiyama&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Apr 2017 06:15:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644820#M98428</guid>
      <dc:creator>sugiyamatoshihi</dc:creator>
      <dc:date>2017-04-26T06:15:23Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644821#M98429</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; I think it makes sense to look at SDMA example of the i.MX6 Platform SDK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Apr 2017 08:34:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644821#M98429</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-04-26T08:34:33Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644822#M98430</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for the information, but I'd like to know if it is possible to access SDMA internal registers through JTAG?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sugiyama&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Apr 2017 09:10:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644822#M98430</guid>
      <dc:creator>sugiyamatoshihi</dc:creator>
      <dc:date>2017-04-26T09:10:14Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644823#M98431</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; You &amp;nbsp;can access SDMA registers via ARM JTAG in the same manner, as it is&lt;/P&gt;&lt;P&gt;performed in Linux driver or SDK example. Basically SDMA has own SDMA TAP,&lt;/P&gt;&lt;P&gt;but we do not have tools to support it for customers.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Apr 2017 07:27:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644823#M98431</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-04-27T07:27:30Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644824#M98432</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for answer.&lt;/P&gt;&lt;P&gt;I understood there is no supoort for SDMA TAP.&lt;/P&gt;&lt;P&gt;However, SDMA registers address is&amp;nbsp;a byte address as 55.10 SDMA Internal (Core) Memory Map and Internal&lt;BR /&gt;Register Definitions, but ARM core register is 32bit address as ARM Platform Memory Map and Control Register Definitions.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;How does it relate both Data field that ARM 32bit addressing&amp;nbsp;and 8bit addressing SDMA internal register?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sugiyama&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Apr 2017 09:27:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644824#M98432</guid>
      <dc:creator>sugiyamatoshihi</dc:creator>
      <dc:date>2017-04-27T09:27:26Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644825#M98433</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp;Sorry for some inaccuracies in my previous replies ; really even if we have&lt;/P&gt;&lt;P&gt;three address spaces - described in the SDMA chapter of the i.MX6 RM&lt;/P&gt;&lt;P&gt;(SDMAARM, SDMACORE, SDMABP) - only SDMAARM registers are accessible&lt;/P&gt;&lt;P&gt;and should be used for ARM platform. &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Apr 2017 06:26:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644825#M98433</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-04-28T06:26:59Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644826#M98434</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I understood.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;P&gt;Sugiyama&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 May 2017 00:49:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA/m-p/644826#M98434</guid>
      <dc:creator>sugiyamatoshihi</dc:creator>
      <dc:date>2017-05-02T00:49:41Z</dc:date>
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