<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>i.MX ProcessorsのトピックRe: Interrupt Vector Table in IMX6Q</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644778#M98423</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #242729; background-color: #ffffff;"&gt;I found the problem. It wasn't in the UART initialization. I forgot to set the VBAR register(vector base address register), whose reset value is 0x00000000. I had linked my vector table at 0x0093ff80. After correctly setting the VBAR register, the UART interrupt is working fine with the above initializations. This is how i set VBAR,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;ldr r6,=__ram_vectors_start&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;MCR p15,0,r6,c12,c0,0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;MCR p15,0,r6,c12,c0,1&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 27 Oct 2016 09:10:32 GMT</pubDate>
    <dc:creator>ajmalali</dc:creator>
    <dc:date>2016-10-27T09:10:32Z</dc:date>
    <item>
      <title>Interrupt Vector Table in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644773#M98418</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;I am using I.MX6Q Sabre sd board. I am trying to build custom image with my own start script and ld script. The image is to be loaded with u-boot. Where should i place the Interrupt vector table? Now, when i reffered the "1.1.0_iMX6_Platform_SDK", The vector table was given as,&lt;BR /&gt;vectors:&lt;BR /&gt; ldr pc, .Lreset_addr&lt;BR /&gt; ldr pc, .Lundefined_addr&lt;BR /&gt; ldr pc, .Lswi_addr&lt;BR /&gt; ldr pc, .Lprefetch_abort_addr&lt;BR /&gt; ldr pc, .Ldata_abort_addr&lt;BR /&gt; ldr pc, .Lreserved_addr &lt;BR /&gt; ldr pc, .Lirq_addr&lt;BR /&gt; ldr pc, .Lfiq_addr&lt;BR /&gt; .word 0&lt;/P&gt;&lt;P&gt;and is loaded at "ORIGIN(OCRAM) + LENGTH(OCRAM) - 72", ie at 0x0093ffb8, as,&lt;/P&gt;&lt;P&gt;.ram_vectors (ORIGIN(OCRAM) + LENGTH(OCRAM) - RAM_VECTORS_SIZE) (NOLOAD) :&lt;BR /&gt; {&lt;BR /&gt; __ram_vectors_start = .;&lt;BR /&gt; . += RAM_VECTORS_SIZE;&lt;BR /&gt; __ram_vectors_end = .;&lt;BR /&gt; } &amp;gt; OCRAM&lt;BR /&gt; &lt;BR /&gt;and later copied to RAM in start as,&lt;BR /&gt; &lt;BR /&gt; ldr r1,=__ram_vectors_start&lt;BR /&gt; ldr r2,=__ram_vectors_end&lt;BR /&gt; ldr r3,=vectors&lt;BR /&gt;1: cmp r1,r2&lt;BR /&gt; ldmlt r3!,{r4,r5,r6}&lt;BR /&gt; stmlt r1!,{r4,r5,r6}&lt;BR /&gt; blt 1b&lt;BR /&gt; &lt;BR /&gt;I am using same approach. But when i enable uart interrupt, it does not enter the ISR. Is there any problem with this approach? Or should i load the vector table at 0x00000000 in ROM ???&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Oct 2016 05:54:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644773#M98418</guid>
      <dc:creator>ajmalali</dc:creator>
      <dc:date>2016-10-18T05:54:54Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt Vector Table in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644774#M98419</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Ajmal&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;one can check sdk interrupt example on&lt;/P&gt;&lt;P&gt;&lt;A _jive_internal="true" class="link-titled" href="https://community.nxp.com/message/405135?commentID=405135#comment-405135" title="https://community.nxp.com/message/405135?commentID=405135#comment-405135"&gt;https://community.nxp.com/message/405135?commentID=405135#comment-405135&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Oct 2016 10:41:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644774#M98419</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-10-18T10:41:58Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt Vector Table in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644775#M98420</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;I have done the same sequence as explained in the thread above. What i really wanted to know was how i can configure the vector table and where to load it. Currently i have loaded it to the location&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&amp;nbsp;"0x0093ffb8", and have enabled the uart interrupt. But, it does not enter the ISR.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Please suggest the possible reasons for this issue. Also please tell the necessary procedures we have to do.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Ajmal&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Note: I am using GNU(arm-none-eabi- ) Assembler&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Oct 2016 07:02:31 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644775#M98420</guid>
      <dc:creator>ajmalali</dc:creator>
      <dc:date>2016-10-19T07:02:31Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt Vector Table in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644776#M98421</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;&lt;SPAN&gt;Ajmal&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;had you looked at function setup_interrupts_in_RAM() in&lt;/P&gt;&lt;P&gt;interrupt.c&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;~igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Oct 2016 07:20:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644776#M98421</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-10-19T07:20:40Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt Vector Table in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644777#M98422</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi igor,&lt;/P&gt;&lt;P&gt;I tried loading the vector table using the above method, still it does not enter the ISR. I have initialized the uart as this,&lt;/P&gt;&lt;P&gt;void UART1_init(void)&lt;BR /&gt;{&lt;BR /&gt; int tmp;&lt;/P&gt;&lt;P&gt;//*********** UART1 IOMUX****************//&lt;BR /&gt; * R32 (IOMUXC_BASE_ADDR+0x280) = 0x00000003; &amp;nbsp; &amp;nbsp; // ALT3 CSI0_DAT10 TxD&lt;BR /&gt; * R32 (IOMUXC_BASE_ADDR+0x284) = 0x00000003; &amp;nbsp; &amp;nbsp; // ALT3 CSI0_DAT11 RxD&lt;BR /&gt; * R32 (IOMUXC_BASE_ADDR+0x920) = 0x00000001; &amp;nbsp; &amp;nbsp; //UART1_UART_RX_DATA_SELECT_INPUT&lt;/P&gt;&lt;P&gt;tmp=(* R32 (CCM_BASE_ADDR+0x24)) &amp;amp; 0x0000003F ; //CSCDR1 uart_podf div by 1&lt;BR /&gt; * R32 (CCM_BASE_ADDR+0x24) = tmp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; // UART refclk = 80MHz&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;// Enable UART1&lt;BR /&gt; // enable uart1, ignore RTS, wordsize 8bits, 1 stop bit, no parity&lt;BR /&gt; *(unsigned int*)(UART1_UCR2_1) = 0x01; &amp;nbsp; &amp;nbsp; &amp;nbsp;// reset UART state machines &lt;BR /&gt; *(unsigned int*)(UART1_UCR2_1) = 0x2006; &amp;nbsp;// UCR2 = CTSC,TXEN,RXEN=1,reset&lt;BR /&gt; *(unsigned int*)(UART1_UCR1_1) = 0x0001; &amp;nbsp;// UARTEN = 1,enable the clock&lt;BR /&gt; *(unsigned int*)(UART1_UCR2_1) |= IGNORE_RTS&amp;lt;&amp;lt;14; // configure IRTS bit&lt;BR /&gt; *(unsigned int*)(UART1_UCR2_1) |= WORD8&amp;lt;&amp;lt;5;&lt;BR /&gt; *(unsigned int*)(UART1_UCR2_1) |= STOP1&amp;lt;&amp;lt;6;&lt;BR /&gt; *(unsigned int*)(UART1_UCR3_1) |= 0x00000004; // set RXD_MUX_SEL bit&lt;BR /&gt; *(unsigned int*)(UART1_UCR1_1) |= 0x0201; // recieve ready interput enable &lt;BR /&gt; &lt;BR /&gt; // disable parity&lt;BR /&gt; *(unsigned int*)(UART1_UCR2_1) &amp;amp;= ~(0x00000100);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;//SetRFDIV_to_div_by_1_UART1(); &lt;BR /&gt; tmp = *(unsigned int*)(UART1_UFCR_1); // save UFCR to default value&lt;BR /&gt; *(unsigned int*)(UART1_UFCR_1) = 5&amp;lt;&amp;lt;7; // set RFDIV to div-by-1 or b101 &lt;BR /&gt; *(unsigned int*)(UART1_UFCR_1) |= tmp; // set other UFCR bits back to default&lt;/P&gt;&lt;P&gt;*(unsigned int*)(UART1_UBIR_1) = 0x4;&lt;BR /&gt; *(unsigned int*)(UART1_UBMR_1) = 0xD8;&lt;/P&gt;&lt;P&gt;*(unsigned int*)(UART1_UCR3_1) |= 0x00000040;&amp;nbsp;&lt;BR /&gt; *(unsigned int*)(UART1_UCR4_1) |= 0x00000081;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* RxTl =1 */&lt;/P&gt;&lt;P&gt;tmp = *(unsigned int*)(UART1_UFCR_1);&lt;BR /&gt; tmp = tmp &amp;amp; 0xffffffc0;&lt;BR /&gt; tmp = tmp | 0x00000001;&lt;BR /&gt; *(unsigned int*)(UART1_UFCR_1) = tmp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;/* Rf div */&lt;BR /&gt; tmp = *(unsigned int*)(UART1_UCR1_1);&lt;BR /&gt; tmp = tmp &amp;amp; 0xfffffcff;&lt;BR /&gt; tmp = tmp | 0x00000200;&lt;BR /&gt; *(unsigned int*)(UART1_UCR1_1) = tmp;&lt;BR /&gt;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am i missing some initialization steps for uart receive interrupt?&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 19 Oct 2016 14:18:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644777#M98422</guid>
      <dc:creator>ajmalali</dc:creator>
      <dc:date>2016-10-19T14:18:05Z</dc:date>
    </item>
    <item>
      <title>Re: Interrupt Vector Table in IMX6Q</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644778#M98423</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #242729; background-color: #ffffff;"&gt;I found the problem. It wasn't in the UART initialization. I forgot to set the VBAR register(vector base address register), whose reset value is 0x00000000. I had linked my vector table at 0x0093ff80. After correctly setting the VBAR register, the UART interrupt is working fine with the above initializations. This is how i set VBAR,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;ldr r6,=__ram_vectors_start&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;MCR p15,0,r6,c12,c0,0&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;MCR p15,0,r6,c12,c0,1&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 27 Oct 2016 09:10:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Interrupt-Vector-Table-in-IMX6Q/m-p/644778#M98423</guid>
      <dc:creator>ajmalali</dc:creator>
      <dc:date>2016-10-27T09:10:32Z</dc:date>
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  </channel>
</rss>

