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    <title>topic i.mx6 PCIE bandwidth issue in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641941#M97990</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I test tw6869 on i.mx6 , it work well with 6 D1 channel at the same time.&lt;BR /&gt;but it will encounter FIFO overflow warning while open 7 or 8 D1 channel.&lt;BR /&gt;It also work well with 8 channel while scale some channel with half size.&lt;BR /&gt; &lt;BR /&gt;I also check message from:&lt;BR /&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="95143" data-objecttype="102" href="https://community.nxp.com/docs/DOC-95143"&gt;https://community.nxp.com/docs/DOC-95143&lt;/A&gt;&lt;BR /&gt;It's seem that no one could enable 8 D1 channel at the same time.&lt;BR /&gt;I suppose that is i.mx6 PCIE bandwidth issue.&lt;BR /&gt;I estimate the bandwidth only 128M Byte instead of 500M PCIE 2.0 standerd&lt;/P&gt;&lt;P&gt;How to enable 8 channel D1 on i.mx6?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 01 Apr 2017 02:29:04 GMT</pubDate>
    <dc:creator>linya</dc:creator>
    <dc:date>2017-04-01T02:29:04Z</dc:date>
    <item>
      <title>i.mx6 PCIE bandwidth issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641941#M97990</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I test tw6869 on i.mx6 , it work well with 6 D1 channel at the same time.&lt;BR /&gt;but it will encounter FIFO overflow warning while open 7 or 8 D1 channel.&lt;BR /&gt;It also work well with 8 channel while scale some channel with half size.&lt;BR /&gt; &lt;BR /&gt;I also check message from:&lt;BR /&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="95143" data-objecttype="102" href="https://community.nxp.com/docs/DOC-95143"&gt;https://community.nxp.com/docs/DOC-95143&lt;/A&gt;&lt;BR /&gt;It's seem that no one could enable 8 D1 channel at the same time.&lt;BR /&gt;I suppose that is i.mx6 PCIE bandwidth issue.&lt;BR /&gt;I estimate the bandwidth only 128M Byte instead of 500M PCIE 2.0 standerd&lt;/P&gt;&lt;P&gt;How to enable 8 channel D1 on i.mx6?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 01 Apr 2017 02:29:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641941#M97990</guid>
      <dc:creator>linya</dc:creator>
      <dc:date>2017-04-01T02:29:04Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6 PCIE bandwidth issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641942#M97991</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi lin&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;your assumptions may be correct as it may require about 30MB/s per channel.&lt;/P&gt;&lt;P&gt;Please refer to PCIe bandwidth measurements on&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="95014" data-objecttype="102" href="https://community.nxp.com/docs/DOC-95014"&gt;https://community.nxp.com/docs/DOC-95014&lt;/A&gt;&lt;BR /&gt;~100MB/s ARM core used as the bus master, and cache is enabled&amp;nbsp;&amp;nbsp; &amp;nbsp;&lt;BR /&gt;~211MB/s IPU used as the bus master(DMA)&lt;/P&gt;&lt;P&gt;To enable 8 channel D1 one can try to decrease channel fps.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 02 Apr 2017 23:19:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641942#M97991</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-04-02T23:19:14Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6 PCIE bandwidth issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641943#M97992</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have the same issue. After starting 8. video channel FIFO overflow bits are set. Video streming with 7 channels is woking.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Is the PCIe bandwidth the reason for this issue? Is there any bug fix for it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Halil Göktepe&lt;/P&gt;&lt;P&gt;h.goektepe@gateconnect.de&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 Mar 2019 12:24:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641943#M97992</guid>
      <dc:creator>halilgoektepe</dc:creator>
      <dc:date>2019-03-29T12:24:23Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6 PCIE bandwidth issue</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641944#M97993</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Lin and Halil,&lt;/P&gt;&lt;P&gt;I am trying to 6 videos recording at the same time. But when I try even 4 videos same time, I face same problem with you I think.&lt;/P&gt;&lt;P&gt;Here is my error line ;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN style="color: #000000; background-color: #ffffff;"&gt;tw6869 0000:01:00.0: tw6869_vch_dma_wait: vch3: video not present &lt;/SPAN&gt;&lt;BR /&gt;tw6869 0000:01:00.0: tw6869_vch_dma_wait: vch0: video not present &lt;BR /&gt;tw6869 0000:01:00.0: tw6869_vch_dma_wait: vch2: video not present &lt;BR /&gt;tw6869 0000:01:00.0: tw6869_vch_dma_wait: vch1: video not present &lt;BR /&gt;tw6869 0000:01:00.0: tw6869_dma_reset: DMA 0 &lt;BR /&gt;tw6869 0000:01:00.0: tw6869_dma_reset: DMA 1 &lt;BR /&gt;tw6869 0000:01:00.0: tw6869_dma_reset: DMA 2 &lt;BR /&gt;tw6869 0000:01:00.0: tw6869_dma_reset: DMA 3&lt;BR /&gt; &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Could you please share your 6 D1 code or could you please help me ? here is my code;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;BR /&gt;gst-launch-1.0 -evvvv v4l2src device=/dev/video0 ! queue2 ! videoscale ! "video/x-raw, width=720, height=576, framerate=25/1" ! \&lt;BR /&gt;imxipuvideotransform ! imxvpuenc_h264 bitrate=6500 ! avimux ! \&lt;BR /&gt;filesink location=/home/root/test0.avi \&lt;BR /&gt;v4l2src device=/dev/video1 ! queue2 ! videoscale ! "video/x-raw, width=720, height=576, framerate=25/1" ! \&lt;BR /&gt;imxipuvideotransform ! imxvpuenc_h264 bitrate=6500 ! avimux ! \&lt;BR /&gt;filesink location=/home/root/test1.avi \&lt;BR /&gt;v4l2src device=/dev/video2 ! queue2 ! videoscale ! "video/x-raw, width=720, height=576, framerate=25/1" ! \&lt;BR /&gt;imxipuvideotransform ! imxvpuenc_h264 bitrate=6500 ! avimux ! \&lt;BR /&gt;filesink location=/home/root/test2.avi \&lt;BR /&gt;v4l2src device=/dev/video3 ! queue2 ! videoscale ! "video/x-raw, width=720, height=576, framerate=25/1" ! \&lt;BR /&gt;imxipuvideotransform ! imxvpuenc_h264 bitrate=6500 ! avimux ! \&lt;BR /&gt;filesink location=/home/root/test3.avi \&lt;BR /&gt;v4l2src device=/dev/video4 ! queue2 ! videoscale ! "video/x-raw, width=720, height=576, framerate=25/1" ! \&lt;BR /&gt;imxipuvideotransform ! imxvpuenc_h264 bitrate=6500 ! avimux ! \&lt;BR /&gt;filesink location=/home/root/test4.avi \&lt;BR /&gt;v4l2src device=/dev/video5 ! queue2 ! videoscale ! "video/x-raw, width=720, height=576, framerate=25/1" ! \&lt;BR /&gt;imxipuvideotransform ! imxvpuenc_h264 bitrate=6500 ! avimux ! \&lt;BR /&gt;filesink location=/home/root/test5.avi&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;PS: I tried with using&amp;nbsp;imxipucompositor and tee command, these ones cannot handle with 3 videos same time even.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Mert TEMEL&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 10 Oct 2019 10:57:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6-PCIE-bandwidth-issue/m-p/641944#M97993</guid>
      <dc:creator>merttml13</dc:creator>
      <dc:date>2019-10-10T10:57:13Z</dc:date>
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