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    <title>topic imx6q MII RGMII in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639753#M97552</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Can the imx6q use RGMII &amp;amp; MII peripheries&amp;nbsp;&amp;nbsp;in the same time (Can these peripheries be active in the same time)?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 22 Sep 2016 06:41:59 GMT</pubDate>
    <dc:creator>eliaz</dc:creator>
    <dc:date>2016-09-22T06:41:59Z</dc:date>
    <item>
      <title>imx6q MII RGMII</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639753#M97552</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Can the imx6q use RGMII &amp;amp; MII peripheries&amp;nbsp;&amp;nbsp;in the same time (Can these peripheries be active in the same time)?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Sep 2016 06:41:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639753#M97552</guid>
      <dc:creator>eliaz</dc:creator>
      <dc:date>2016-09-22T06:41:59Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q MII RGMII</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639754#M97553</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Hello,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;IMX6Q has ENET module, which supports MII, RMII, RGMII interfaces&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Pins affected are described in Table 23-1 (ENET External Signals) of &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;the i.MX6 RM (Rev. 3, 07/2015). Only single interface may be used &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;at a time because of multiplexing.&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Have a great day,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Yuri&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Note: If this post answers your question, please click the Correct &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Answer button. Thank you!&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Sep 2016 07:12:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639754#M97553</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-09-22T07:12:32Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q MII RGMII</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639755#M97554</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;can you be more specific about multiplexing , which signal is shared between the interfaces?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 22 Sep 2016 11:01:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639755#M97554</guid>
      <dc:creator>eliaz</dc:creator>
      <dc:date>2016-09-22T11:01:01Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q MII RGMII</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639756#M97555</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;can you be more specific about multiplexing , which signal is shared between the interfaces?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Sep 2016 08:18:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639756#M97555</guid>
      <dc:creator>eliaz</dc:creator>
      <dc:date>2016-09-26T08:18:34Z</dc:date>
    </item>
    <item>
      <title>Re: imx6q MII RGMII</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639757#M97556</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;can you be more specific about multiplexing , which signal is shared between the interfaces?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Sep 2016 08:19:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx6q-MII-RGMII/m-p/639757#M97556</guid>
      <dc:creator>eliaz</dc:creator>
      <dc:date>2016-09-26T08:19:47Z</dc:date>
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