topic Re: Why isn't the eMMC fast-boot failing over to normal boot? in i.MX Processors

Why isn't the eMMC fast-boot failing over to normal boot?

hughboddington — Tue, 08 Nov 2016 13:41:04 GMT

We're using an eMMC 4.4.1 chip with our imx.6 design and trying to boot into u-boot using fast-boot mode (BOOT_CFG1[4]=1). This mode works if the eMMC is in a pre-idle state (i.e., just after power-on reset). If the imx.6 is reset without cycling power, the eMMC is NOT in pre-idle and therefore cannot enter fast-boot mode. That's all fine and good, but the imx.6 FRM suggests that if fast-boot mode fails then the eMMC "boots as a normal MMC card from the selected boot partition" (that's a quote from table 8-16 of the FRM). This isn't happening. Instead, the imx.6 locks up and won't boot at all. It's crucial for us that this fail-over behaviour works properly:

Desired behaviour:

Attempt fast-boot -> Fail -> Attempt normal-boot -> Succeed

Observed behaviour:

Attempt fast-boot -> Fail -> Lock up

Am I doing something wrong? If I manually disable fast-boot mode then the boot process works properly, but I'm not seeing that fast-boot fail-over behaviour. We do not have a reset pin connected so it's not feasible to enable the hardware eMMC reset (BOOT_CFG1[1]).

Any thoughts?

Additional information: Our BOOT_CFG is set to 0x0000DC70

Re: Why isn't the eMMC fast-boot failing over to normal boot?

igorpadykov — Wed, 16 Nov 2016 08:33:55 GMT

Hi Hugh

i.MX6 supports special boot mode with CMD line low and it is described in eMMC
ver.4.4 specification JESD84-A44 sect.7.3.3 Boot operation p.36 as follows:

"If the CMD line is held LOW for less than 74 clock cycles after power-up before CMD1 is issued, or the
master sends any normal MMC command other than CMD0 with argument 0xFFFFFFFA before initiating
boot mode, the slave shall not respond and shall be locked out of boot mode until the next power cycle or
hardware reset.."

So according to specification it is necessary to power cycle or use eMMC hardware reset signal.

Best regards
igor
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Re: Why isn't the eMMC fast-boot failing over to normal boot?

hughboddington — Wed, 16 Nov 2016 13:40:17 GMT

That is all true and I totally agree with you. However, according to the imx6 FRM (table 8-16 in chapter 8.5.3.2):

"...ROM waits 1 second for data. If BOOT ACK or data was received then eMMC4.3/eMMC4.4 is booted in "Boot mode", otherwise eMMC4.3/eMMC4.4 boots as a normal MMC card from the selected boot partition."

That implies to me that if the eMMC wasn't power cycled or hardware reset, then it will fail to send a BOOT ACK or data and the ROM will fall-back to using the normal boot mode. Can you confirm?

Re: Why isn't the eMMC fast-boot failing over to normal boot?

igorpadykov — Wed, 16 Nov 2016 13:59:21 GMT

yes i.MX6 fall-back to using the normal boot mode, but at this time

eMMC is already locked and can not respond to processor until power cycle or
hardware reset.

also could you recheck that "Secondary" image and its tag was set correctly as

shown on Table 8-18. Secondary Image Table Format i.MX6DQ Reference Manual
http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6DQRM.pdf

Best regards
igor

Re: Why isn't the eMMC fast-boot failing over to normal boot?

jonconsidine — Fri, 01 Mar 2019 11:24:54 GMT

Hi Igor,

Just tackling the same problem here (no reset line). If you were to send CMD0 with argument 0xFFFFFFFA before triggering watchdog2 (e.g. 'reset' from u-boot) would that not correctly reset the eMMC before the iMX6 then tries to initiate the boot sequence?

Regards,

Jon

Re: Why isn't the eMMC fast-boot failing over to normal boot?

jonconsidine — Fri, 01 Mar 2019 13:13:00 GMT

Following on from my own reply(!), as a test I added a new command 'mmc reset' in u-boot which sends CMD0 with argument 0xF0F0F0F0 (as per the JEDEC spec below). If I issue an 'mmc reset' and then a 'reset', the iMX6 boots correctly in fast-boot mode, whereas without the 'mmc reset' command, it hangs as described by @ Hugh Boddington above.

Re: Why isn't the eMMC fast-boot failing over to normal boot?

igorpadykov — Sat, 02 Mar 2019 02:51:18 GMT

Hi Jon

yes as per eMMC specification:

Reset: CMD0 with argument of 0x00000000 or 0xF0F0F0F0, H/W reset

Best regards
igor