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    <title>i.MX ProcessorsのトピックRe: (Q4) Required queries about IMX6 ultra lite processor with RTC and VSNVS. Need help for clarification</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Q4-Required-queries-about-IMX6-ultra-lite-processor-with-RTC-and/m-p/639035#M97446</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rameshkumar&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;right, without coin cell VSVNS output also will be generated once VIN comes,&lt;/P&gt;&lt;P&gt;no affect on power up sequence . Charge current is given in Table 29 PF3000 Datasheet &lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/analog/doc/data_sheet/PF3000.pdf"&gt;http://cache.freescale.com/files/analog/doc/data_sheet/PF3000.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Regarding low schematic crystal should be connected to one chip - to RTC_XTALI,&lt;/P&gt;&lt;P&gt;RTC_XTALO or to OSCI, OSCO, not both.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 24 Dec 2016 01:05:02 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-12-24T01:05:02Z</dc:date>
    <item>
      <title>(Q4) Required queries about IMX6 ultra lite processor with RTC and VSNVS. Need help for clarification</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Q4-Required-queries-about-IMX6-ultra-lite-processor-with-RTC-and/m-p/639034#M97445</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;STRONG&gt;RTC &amp;amp; VSNVS related Queries&lt;/STRONG&gt;: &lt;BR /&gt;We are going to use external RTC for our application, so coin cell connected in external RTC circuit and the connected to&amp;nbsp;for PMIC pin LICELL (36).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. We hope Coin cell will get charged once the RAW power comes to Vin pin of the PMIC through enabling&amp;nbsp; COINCHEN bit,&amp;nbsp; VCOIN[2:0] bits on register COINCTL. Am i right? And what is the defalut current allowed to charge coin cell?&lt;/P&gt;&lt;P&gt;2. Without Coin cell input also VSVNS output will generate once VIN RAW power comes,&amp;nbsp;So please confirm the power up sequence will not get affected.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Q5.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/1176i22850CBEA6BAD64F/image-size/large?v=v2&amp;amp;px=999" role="button" title="Q5.png" alt="Q5.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please confirm our Schematic design below for Coin cell battery charge through PMIC Vin and VSNVS power -up sequence will not get affect.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Q7.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/1018iB3FD58248ADD8924/image-size/large?v=v2&amp;amp;px=999" role="button" title="Q7.png" alt="Q7.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in Advance,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Rameshkumar&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 23 Dec 2016 09:03:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Q4-Required-queries-about-IMX6-ultra-lite-processor-with-RTC-and/m-p/639034#M97445</guid>
      <dc:creator>ramesh6663</dc:creator>
      <dc:date>2016-12-23T09:03:20Z</dc:date>
    </item>
    <item>
      <title>Re: (Q4) Required queries about IMX6 ultra lite processor with RTC and VSNVS. Need help for clarification</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Q4-Required-queries-about-IMX6-ultra-lite-processor-with-RTC-and/m-p/639035#M97446</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rameshkumar&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;right, without coin cell VSVNS output also will be generated once VIN comes,&lt;/P&gt;&lt;P&gt;no affect on power up sequence . Charge current is given in Table 29 PF3000 Datasheet &lt;/P&gt;&lt;P&gt;&lt;A href="http://cache.freescale.com/files/analog/doc/data_sheet/PF3000.pdf"&gt;http://cache.freescale.com/files/analog/doc/data_sheet/PF3000.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Regarding low schematic crystal should be connected to one chip - to RTC_XTALI,&lt;/P&gt;&lt;P&gt;RTC_XTALO or to OSCI, OSCO, not both.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 24 Dec 2016 01:05:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Q4-Required-queries-about-IMX6-ultra-lite-processor-with-RTC-and/m-p/639035#M97446</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-12-24T01:05:02Z</dc:date>
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