<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: Boot up sequence of i.MX6UL through eMMC</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Boot-up-sequence-of-i-MX6UL-through-eMMC/m-p/637202#M97077</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Surendra&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think settings are correct, note also bus width should be configured in eMMC&lt;/P&gt;&lt;P&gt;Extend CSD register byte[177] bit[0:1].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 31 Mar 2017 05:40:22 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2017-03-31T05:40:22Z</dc:date>
    <item>
      <title>Boot up sequence of i.MX6UL through eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-up-sequence-of-i-MX6UL-through-eMMC/m-p/637201#M97076</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Can any one tell me the the BOOT_CFG setting for configuring the boot through eMMC.&lt;/P&gt;&lt;P&gt;Following configuration I tried to have booting from eMMC. Kindly confirm or suggest the seeting of Boot_CFG.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="Booting.PNG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/15950i1A754BE44BED88E9/image-size/large?v=v2&amp;amp;px=999" role="button" title="Booting.PNG" alt="Booting.PNG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Red numbers shows my setting where 1 represents Pull up and 0 represents Pull down.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Surendra&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Mar 2017 14:55:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-up-sequence-of-i-MX6UL-through-eMMC/m-p/637201#M97076</guid>
      <dc:creator>surendrajadhav</dc:creator>
      <dc:date>2017-03-30T14:55:29Z</dc:date>
    </item>
    <item>
      <title>Re: Boot up sequence of i.MX6UL through eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Boot-up-sequence-of-i-MX6UL-through-eMMC/m-p/637202#M97077</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Surendra&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I think settings are correct, note also bus width should be configured in eMMC&lt;/P&gt;&lt;P&gt;Extend CSD register byte[177] bit[0:1].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 31 Mar 2017 05:40:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Boot-up-sequence-of-i-MX6UL-through-eMMC/m-p/637202#M97077</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-03-31T05:40:22Z</dc:date>
    </item>
  </channel>
</rss>

