i.MX ProcessorsのトピックRe: DRAM SDCKE external pull down resistors

DRAM SDCKE external pull down resistors

atillametetured — Wed, 30 Nov 2016 08:07:47 GMT

Hi,

Sabre SD has them but HW guide states they are no longer needed because they have on-chip pull downs. I did not implement these in my design but it gets me wondering why it says "no longer". Was this fixed with a new series of chips, if so, how do I know I get the new ones? Do pull downs need to be activated or are they active by default?

I am using iMx6Q with T topology 4xDDR3L chips total of 16Gb and only the DRAM_SDCKE0.

Regards,

Mete

Re: DRAM SDCKE external pull down resistors

art — Wed, 30 Nov 2016 11:57:18 GMT

In case of DDR3/DDR3L memory, the SDCKE pull-downs are not required at all. They only might be required in case of LPDDR2 memory.

Have a great day,
Artur

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Re: DRAM SDCKE external pull down resistors

atillametetured — Wed, 30 Nov 2016 12:13:39 GMT

Hi Artur,

Thank you very much.

Regards,

Mete

Re: DRAM SDCKE external pull down resistors

Yuri — Thu, 01 Dec 2016 03:22:53 GMT

Hello,

More details why for DDR3: SDCKE[1:0] pull-down is used in the SDP\B, although it is not recommended:
“DRAM_SDCKE0 and DRAM_SDCKE1 require external resistors (such as 10 kΩ) to GND to minimize current
drain during deep sleep mode (DSM).
The BSP (Board Support Package) uses a common DDR routine for both fly-by and T-topology designs.
Fly-by designs have parallel resistor termination on address lines, while T-topology does not.

During low-power self refresh, the BSP programs pad control register GRP_CTLDS to 0x00000000. Therefore,
DRAM_SDCKE0, DRAM_SDCKE1, and other associated GRP_CTLDS I/O are forced to the high-impedance state.

Because DRAM_SDCKE0 and DRAM_SDCKE1 are forced to high-Z, external pull-down resistors are required to
avoid floating outputs during standby. In Freescale designs, 10 kohm resistors are utilized for this purpose.
Any other termination on the DRAM_SDCKE0 and DRAM_SDCKE1 lines (such as 50 ohms) should not be present;
simulation should be performed to ensure CKE signal integrity.”

Regards,

Yuri.

Re: DRAM SDCKE external pull down resistors

atillametetured — Thu, 01 Dec 2016 07:41:35 GMT

Hello Yuri,

I found that in mx6q_4x_mt41j128.cfg 0x020e078c is set to 0x00000030 which impiles 40 Ohm DSE for Control signals. Where exactly is it set to 0x00000000? Is it in the linux bsp? Do you think it will be an issue for us where PD resistors are not included? How can we fix this if it is an issue?

Regards,

Mete

Re: DRAM SDCKE external pull down resistors

Yuri — Fri, 02 Dec 2016 03:02:15 GMT

Hello,

Yes, Linux BSP during deep sleep mode (DSM) reconfigure the pad
control register in order to minimize current drain. No problems expected

when DSM is not used.

Regards,

Yuri.

Re: DRAM SDCKE external pull down resistors

atillametetured — Fri, 02 Dec 2016 05:01:10 GMT

Hi Yuri,

Your help is appreciated.

Cheers,

Mete