topic Re: IMX6 PCI with external cloks in i.MX Processors

IMX6 PCI with external cloks

alfredk — Thu, 30 Mar 2017 17:34:43 GMT

Hello, I had a problem, to launch a board with an imx6 solo processor with a pci-express, and with external clock. I'll tell you my decision.

On my motherboard there is a pci-switch PI7C9X2G606 from Pericom with 4 endpoints of Intel type 82574 ethernet controller.

I used the Linux kernel version 4.9.16

In the device-tree file, I used the following options to enable external clocks for CLK1 input gate (100MHz). Sorry, I had to change the root imx6 device tree file. See attached (imx6*.dtsi) files. From ..kernel/arch/arm/boot/dts/..

Add anatop external clock source for clocks section, and change clk source for pcie-phy.

...

anaclk1 {
           compatible = "fixed-clock";
           reg = <0>;
           #clock-cells = <0>;
           clock-frequency = <100000000>; /* 100MHz */
       };

...

Change pcie section

...

        pcie: pcie@0x01000000 {
           compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
           reg = <0x01ffc000 0x04000>,
                  <0x01f00000 0x80000>;
           reg-names = "dbi", "config";
           #address-cells = <3>;
           #size-cells = <2>;
           device_type = "pci";
           ranges = <0x81000000 0 0          0x01e00000 0 0x00100000 /* downstream I/O */
                  0x82000000 0 0x01000000 0x01000000 0 0x00e00000>; /* non-prefetchable memory */
           /* ranges = <0x81000000 0 0          0x01f80000 0 0x00010000
                  0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; */
           num-lanes = <1>;
           interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
           interrupt-names = "msi";
           #interrupt-cells = <1>;
           interrupt-map-mask = <0 0 0 0x7>;
           interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
                            <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
                            <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
                            <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
           clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
               <&clks IMX6QDL_CLK_LVDS1_IN>,
               <&clks IMX6QDL_CLK_SATA_REF_100M>;
           clock-names = "pcie", "pcie_bus", "pcie_phy";
           status = "disabled";
       };

...

and add new source clocks dependencies:

....

&clks {
        assigned-clocks = <&clks IMX6QDL_PLL6_BYPASS_SRC>,
                          <&clks IMX6QDL_PLL6_BYPASS>;
       assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS1_IN>,
                                 <&clks IMX6QDL_PLL6_BYPASS_SRC>;
        assigned-clock-rates = <100000000>, <100000000>;
};

....

for your board dtsi.

I could not start the pcie-bus with the function Gen2.

Next, I needed to change the bus driver (pci-imx6.c), for fine tuning the bus clock frequency. I add MPLL frequency services functions (Thanks for Charle Powe i.MX6Q: Using an external reference for PCIe ):

...

static void imx_pcie_override_phy_mpll(struct pcie_port *pp, u32 mpll_multiplier, u32 ref_clkdiv2)
{
    u32 ref_usb2_en;
    u32 reg1;


   pr_info("Overriding PCIe PHY MPLL config: multiplier = %d, clkdiv2 = %d\n",
        mpll_multiplier, ref_clkdiv2);


   // set MPLL to disabled
   ////pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO, 0x0001);

   // set MPLL multiplier
    pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO,
           (0x0001<<9 | (mpll_multiplier<<2)) & 0x03fc);

    /*
     * set the ref_clkdiv2. when this override is enabled it
     * overrides both ref_clkdiv2 and ref_usb2_en. make sure
     * the overriden ref_usb2_en reflects the original value.
     */
    pcie_phy_read(pp->dbi_base, PCIE_PHY_ATEOVRD, &reg1);
    ref_usb2_en = (reg1 >> 1) & 0x1;

    /* set the current value of ref_usb2_en as the override */
    /* set the ref_clkdiv2 override */
    /* enable the ref_clkdiv2 override */
    pcie_phy_write(pp->dbi_base, PCIE_PHY_ATEOVRD,
           (ref_usb2_en << 1) | ref_clkdiv2 | (0x1 << 2));

    /* enable MPLL */
    ///pcie_phy_write(pp->dbi_base, PCIE_PHY_MPLL_OVRD_IN_LO, 0x0003);

}

...

call this function in pcie_hos_init

...

static void imx6_pcie_host_init(struct pcie_port *pp)
{
   imx6_pcie_assert_core_reset(pp);
   imx6_pcie_init_phy(pp);
   imx6_pcie_deassert_core_reset(pp);
   imx_pcie_override_phy_mpll(pp, 50, 1); /* tune this */
   dw_pcie_setup_rc(pp);

imx6_pcie_establish_link(pp);

if (IS_ENABLED(CONFIG_PCI_MSI))
dw_pcie_msi_init(pp);
}

...

See documentation for p.p. IMX6DLRM 50.5.1.2.

Tune <pci_hotplug_mem_size> global variable for optimal pci window sizes enumeration.

See for my imx6_add_pcie_port call.

If you use a FEC module, it will stop working. You must use an external clock as specified in the documentation (http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf ). Changes are shown in the attached dtsi file.

For clocks segment

...

rmii_clk: clock@0 {
           compatible = "fixed-clock";
           reg = <0>;
           #clock-cells = <0>;
           clock-frequency = <50000000>; /* 50MHz */
       };

...

and for fec:

...

fec: ethernet@02188000 {
               compatible = "fsl,imx6q-fec";
               reg = <0x02188000 0x4000>;
               interrupts-extended =
                   <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
                   <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
               clocks = <&clks IMX6QDL_CLK_ENET>,
                   <&clks IMX6QDL_CLK_ENET>,
                   <&rmii_clk>;
               clock-names = "ipg", "ahb", "ptp";
               status = "disabled";
           };

...

If they are not required, disable this editing this file.

Thanks for all. Sorry for my bad English.

Alfred <muksunoved@mail.ru>

Original Attachment has been moved to: forum.tar.bz2

Re: IMX6 PCI with external cloks

maxmar — Tue, 13 Jun 2017 10:02:13 GMT

Dear Alfred,

I have the same need. Did you solve your problem ?

Re: IMX6 PCI with external cloks

alfredk — Thu, 15 Jun 2017 18:27:59 GMT

Hello.

All that is described above and there is a solution to my problem.
What does not work for you?

Re: IMX6 PCI with external cloks

Yuri — Fri, 16 Jun 2017 02:03:40 GMT

Hello,

I converted the discussion above to document.

Hope this helps to customers.

https://community.nxp.com/docs/DOC-334667

Regards,

Yuri.

Re: IMX6 PCI with external cloks

maxmar — Thu, 29 Jun 2017 08:08:00 GMT

Hello,

I used the Linux kernel version 4.1. If I apply your configuration the kernel does not start.

Re: IMX6 PCI with external cloks

alfredk — Thu, 29 Jun 2017 17:11:32 GMT

Hello massimiliano
Can you give more details. What demo board do you use?
Here is the download log from my board. Perhaps this will clarify the situation...

root@imx6s-nft-kdsa:~# dmesg
[    0.000000] Booting Linux on physical CPU 0x0
[    0.000000] Linux version 4.9.16-g5f54fdc-dirty (alfredk@ubuntu) (gcc version 6.1.1 20160711 (Linaro GCC 6.1-2016.08) ) #78 SMP Wed May 3 16:20:50 +05 2017
[    0.000000] CPU: ARMv7 Processor [412fc09a] revision 10 (ARMv7), cr=10c5387d
[    0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache
[    0.000000] OF: fdt:Machine model: Nefteavtomatika (NFT) KDSA board
[    0.000000] cma: Reserved 16 MiB at 0x4f000000
[    0.000000] Memory policy: Data cache writeback
[    0.000000] On node 0 totalpages: 262144
[    0.000000] free_area_init_node: node 0, pgdat c0e66f40, node_mem_map ef7f8000
[    0.000000]   Normal zone: 1536 pages used for memmap
[    0.000000]   Normal zone: 0 pages reserved
[    0.000000]   Normal zone: 196608 pages, LIFO batch:31
[    0.000000]   HighMem zone: 65536 pages, LIFO batch:15
[    0.000000] CPU: All CPU(s) started in SVC mode.
[    0.000000] percpu: Embedded 14 pages/cpu @ef7be000 s26728 r8192 d22424 u57344
[    0.000000] pcpu-alloc: s26728 r8192 d22424 u57344 alloc=14*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 260608
[    0.000000] Kernel command line: console=ttymxc0,115200 root=/dev/mmcblk0p2 rootwait rw
[    0.000000] PID hash table entries: 4096 (order: 2, 16384 bytes)
[    0.000000] Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
[    0.000000] Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
[    0.000000] Memory: 1000940K/1048576K available (9216K kernel code, 415K rwdata, 2888K rodata, 1024K init, 8234K bss, 31252K reserved, 16384K cma-reserved, 245760K highmem)
[    0.000000] Virtual kernel memory layout:
[    0.000000]     vector : 0xffff0000 - 0xffff1000   (   4 kB)
[    0.000000]     fixmap : 0xffc00000 - 0xfff00000   (3072 kB)
[    0.000000]     vmalloc : 0xf0800000 - 0xff800000   ( 240 MB)
[    0.000000]     lowmem : 0xc0000000 - 0xf0000000   ( 768 MB)
[    0.000000]     pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
[    0.000000]     modules : 0xbf000000 - 0xbfe00000   ( 14 MB)
[    0.000000]       .text : 0xc0008000 - 0xc0a00000   (10208 kB)
[    0.000000]       .init : 0xc0d00000 - 0xc0e00000   (1024 kB)
[    0.000000]       .data : 0xc0e00000 - 0xc0e67c80   ( 416 kB)
[    0.000000]        .bss : 0xc0e69000 - 0xc1673aa0   (8235 kB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=2, Nodes=1
[    0.000000] Running RCU self tests
[    0.000000] Hierarchical RCU implementation.
[    0.000000] RCU lockdep checking is enabled.
[    0.000000] Build-time adjustment of leaf fanout to 32.
[    0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
[    0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
[    0.000000] NR_IRQS:16 nr_irqs:16 16
[    0.000000] L2C-310 erratum 769419 enabled
[    0.000000] L2C-310 enabling early BRESP for Cortex-A9
[    0.000000] L2C-310 full line of zeros enabled for Cortex-A9
[    0.000000] L2C-310 ID prefetch enabled, offset 16 lines
[    0.000000] L2C-310 dynamic clock gating enabled, standby mode enabled
[    0.000000] L2C-310 cache controller enabled, 16 ways, 512 kB
[    0.000000] L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76450001
[    0.000000] Switching to timer-based delay loop, resolution 333ns
[    0.000008] sched_clock: 32 bits at 3000kHz, resolution 333ns, wraps every 715827882841ns
[    0.000028] clocksource: mxc_timer1: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 637086815595 ns
[    0.001232] Console: colour dummy device 80x30
[    0.001261] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[    0.001271] ... MAX_LOCKDEP_SUBCLASSES: 8
[    0.001280] ... MAX_LOCK_DEPTH:          48
[    0.001288] ... MAX_LOCKDEP_KEYS:        8191
[    0.001296] ... CLASSHASH_SIZE:          4096
[    0.001306] ... MAX_LOCKDEP_ENTRIES:     32768
[    0.001314] ... MAX_LOCKDEP_CHAINS:      65536
[    0.001323] ... CHAINHASH_SIZE:          32768
[    0.001333] memory used by lock dependency info: 5167 kB
[    0.001342] per task-struct memory footprint: 1536 bytes
[    0.001383] Calibrating delay loop (skipped), value calculated using timer frequency.. 6.00 BogoMIPS (lpj=30000)
[    0.001405] pid_max: default: 32768 minimum: 301
[    0.001700] Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.001718] Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
[    0.003469] CPU: Testing write buffer coherency: ok
[    0.004263] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.004314] Setting up static identity map for 0x10100000 - 0x10100070
[    0.008837] Brought up 1 CPUs
[    0.008855] SMP: Total of 1 processors activated (6.00 BogoMIPS).
[    0.008867] CPU: All CPU(s) started in SVC mode.
[    0.010954] devtmpfs: initialized
[    0.037984] VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
[    0.038895] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.038933] futex hash table entries: 512 (order: 3, 32768 bytes)
[    0.040164] pinctrl core: initialized pinctrl subsystem
[    0.043287] NET: Registered protocol family 16
[    0.045792] DMA: preallocated 256 KiB pool for atomic coherent allocations
[    0.049271] cpuidle: using governor menu
[    0.049325] fpanel_sysfs_init: panel register calss 0
[    0.049336] fpanel_sysfs_init: panel fpanel chip is NULL
[    0.049488] CPU identified as i.MX6DL, silicon rev 1.3
[    0.090539] No ATAGs?
[    0.090582] hw-breakpoint: found 5 (+1 reserved) breakpoint and 1 watchpoint registers.
[    0.090595] hw-breakpoint: maximum watchpoint size is 4 bytes.
[    0.092989] imx6dl-pinctrl 20e0000.iomuxc: initialized IMX pinctrl driver
[    0.163196] mxs-dma 110000.dma-apbh: initialized
[    0.167154] vgaarb: loaded
[    0.167988] SCSI subsystem initialized
[    0.168480] libata version 3.00 loaded.
[    0.169215] usbcore: registered new interface driver usbfs
[    0.169376] usbcore: registered new interface driver hub
[    0.169686] usbcore: registered new device driver usb
[    0.172908] i2c i2c-2: IMX I2C adapter registered
[    0.172941] i2c i2c-2: can't use DMA, using PIO instead.
[    0.173773] Linux video capture interface: v2.00
[    0.173988] pps_core: LinuxPPS API ver. 1 registered
[    0.174000] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.174047] PTP clock support registered
[    0.174894] Advanced Linux Sound Architecture Driver Initialized.
[    0.179126] clocksource: Switched to clocksource mxc_timer1
[    0.179777] VFS: Disk quotas dquot_6.6.0
[    0.179907] VFS: Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
[    0.206584] NET: Registered protocol family 2
[    0.208166] TCP established hash table entries: 8192 (order: 3, 32768 bytes)
[    0.208302] TCP bind hash table entries: 8192 (order: 6, 294912 bytes)
[    0.210939] TCP: Hash tables configured (established 8192 bind 8192)
[    0.211148] UDP hash table entries: 512 (order: 3, 40960 bytes)
[    0.211511] UDP-Lite hash table entries: 512 (order: 3, 40960 bytes)
[    0.212549] NET: Registered protocol family 1
[    0.213768] RPC: Registered named UNIX socket transport module.
[    0.213786] RPC: Registered udp transport module.
[    0.213799] RPC: Registered tcp transport module.
[    0.213809] RPC: Registered tcp NFSv4.1 backchannel transport module.
[    0.213829] PCI: CLS 0 bytes, default 64
[    0.215516] hw perfevents: enabled with armv7_cortex_a9 PMU driver, 7 counters available
[    0.220872] workingset: timestamp_bits=30 max_order=18 bucket_order=0
[    0.242654] NFS: Registering the id_resolver key type
[    0.242840] Key type id_resolver registered
[    0.242854] Key type id_legacy registered
[    0.242980] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[    0.244749] fuse init (API version 7.26)
[    0.254444] bounce: pool size: 64 pages
[    0.254536] io scheduler noop registered
[    0.254551] io scheduler deadline registered
[    0.255003] io scheduler cfq registered (default)
[    0.255754] imx-weim 21b8000.weim: Driver registered.
[    0.257746] OF: PCI: host bridge /soc/pcie@0x01000000 ranges:
[    0.257768] OF: PCI:   No bus range found for /soc/pcie@0x01000000, using [bus 00-ff]
[    0.257817] OF: PCI:    IO 0x01e00000..0x01efffff -> 0x00000000
[    0.257908] OF: PCI:   MEM 0x01000000..0x01dfffff -> 0x01000000
[    0.479197] Overriding PCIe PHY MPLL config: multiplier = 50, clkdiv2 = 1
[    0.579360] imx6q-pcie 1ffc000.pcie: link up
[    0.579377] imx6q-pcie 1ffc000.pcie: Link: Gen2 disabled
[    0.579391] imx6q-pcie 1ffc000.pcie: link up
[    0.579405] imx6q-pcie 1ffc000.pcie: Link up, Gen1
[    0.580035] imx6q-pcie 1ffc000.pcie: PCI host bridge to bus 0000:00
[    0.580060] pci_bus 0000:00: root bus resource [bus 00-ff]
[    0.580077] pci_bus 0000:00: root bus resource [io 0x0000-0xfffff]
[    0.580092] pci_bus 0000:00: root bus resource [mem 0x01000000-0x01dfffff]
[    0.580223] pci 0000:00:00.0: [16c3:abcd] type 01 class 0x060400
[    0.580267] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff]
[    0.580304] pci 0000:00:00.0: reg 0x38: [mem 0x00000000-0x0000ffff pref]
[    0.580495] pci 0000:00:00.0: supports D1
[    0.580507] pci 0000:00:00.0: PME# supported from D0 D1 D3hot D3cold
[    0.581349] PCI: bus0: Fast back to back transfers disabled
[    0.581804] pci 0000:01:00.0: [12d8:2608] type 01 class 0x060400
[    0.582588] pci 0000:01:00.0: supports D1 D2
[    0.582600] pci 0000:01:00.0: PME# supported from D0 D1 D2 D3hot D3cold
[    0.609281] PCI: bus1: Fast back to back transfers disabled
[    0.609315] pci 0000:01:00.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.609877] pci_bus 0000:02: busn_res: can not insert [bus 02-ff] under [bus 01] (conflicts with (null) [bus 01])
[    0.610044] pci 0000:02:01.0: [12d8:2608] type 01 class 0x060400
[    0.610845] pci 0000:02:01.0: supports D1 D2
[    0.610857] pci 0000:02:01.0: PME# supported from D0 D1 D2 D3hot D3cold
[    0.611687] pci 0000:02:02.0: [12d8:2608] type 01 class 0x060400
[    0.612474] pci 0000:02:02.0: supports D1 D2
[    0.612485] pci 0000:02:02.0: PME# supported from D0 D1 D2 D3hot D3cold
[    0.613318] pci 0000:02:03.0: [12d8:2608] type 01 class 0x060400
[    0.614097] pci 0000:02:03.0: supports D1 D2
[    0.614107] pci 0000:02:03.0: PME# supported from D0 D1 D2 D3hot D3cold
[    0.614930] pci 0000:02:04.0: [12d8:2608] type 01 class 0x060400
[    0.615723] pci 0000:02:04.0: supports D1 D2
[    0.615734] pci 0000:02:04.0: PME# supported from D0 D1 D2 D3hot D3cold
[    0.616917] PCI: bus2: Fast back to back transfers disabled
[    0.616946] pci 0000:02:01.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.617008] pci 0000:02:02.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.617068] pci 0000:02:03.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.617128] pci 0000:02:04.0: bridge configuration invalid ([bus 00-00]), reconfiguring
[    0.617795] pci 0000:03:00.0: [8086:10d3] type 00 class 0x020000
[    0.617915] pci 0000:03:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
[    0.618025] pci 0000:03:00.0: reg 0x18: [io 0x0000-0x001f]
[    0.618085] pci 0000:03:00.0: reg 0x1c: [mem 0x00000000-0x00003fff]
[    0.618733] pci 0000:03:00.0: PME# supported from D0 D3hot D3cold
[    0.619702] PCI: bus3: Fast back to back transfers disabled
[    0.619725] pci_bus 0000:03: busn_res: [bus 03-ff] end is updated to 03
[    0.619750] pci_bus 0000:03: [bus 03] partially hidden behind bridge 0000:01 [bus 01]
[    0.620415] pci 0000:04:00.0: [8086:10d3] type 00 class 0x020000
[    0.620535] pci 0000:04:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
[    0.620646] pci 0000:04:00.0: reg 0x18: [io 0x0000-0x001f]
[    0.620707] pci 0000:04:00.0: reg 0x1c: [mem 0x00000000-0x00003fff]
[    0.621359] pci 0000:04:00.0: PME# supported from D0 D3hot D3cold
[    0.622241] PCI: bus4: Fast back to back transfers disabled
[    0.622265] pci_bus 0000:04: busn_res: [bus 04-ff] end is updated to 04
[    0.622289] pci_bus 0000:04: [bus 04] partially hidden behind bridge 0000:01 [bus 01]
[    0.622949] pci 0000:05:00.0: [8086:10d3] type 00 class 0x020000
[    0.623068] pci 0000:05:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
[    0.623179] pci 0000:05:00.0: reg 0x18: [io 0x0000-0x001f]
[    0.623238] pci 0000:05:00.0: reg 0x1c: [mem 0x00000000-0x00003fff]
[    0.623885] pci 0000:05:00.0: PME# supported from D0 D3hot D3cold
[    0.624771] PCI: bus5: Fast back to back transfers disabled
[    0.624793] pci_bus 0000:05: busn_res: [bus 05-ff] end is updated to 05
[    0.624816] pci_bus 0000:05: [bus 05] partially hidden behind bridge 0000:01 [bus 01]
[    0.625468] pci 0000:06:00.0: [8086:10d3] type 00 class 0x020000
[    0.625584] pci 0000:06:00.0: reg 0x10: [mem 0x00000000-0x0001ffff]
[    0.625697] pci 0000:06:00.0: reg 0x18: [io 0x0000-0x001f]
[    0.625757] pci 0000:06:00.0: reg 0x1c: [mem 0x00000000-0x00003fff]
[    0.626409] pci 0000:06:00.0: PME# supported from D0 D3hot D3cold
[    0.627301] PCI: bus6: Fast back to back transfers disabled
[    0.627324] pci_bus 0000:06: busn_res: [bus 06-ff] end is updated to 06
[    0.627348] pci_bus 0000:06: [bus 06] partially hidden behind bridge 0000:01 [bus 01]
[    0.627375] pci_bus 0000:02: busn_res: [bus 02-ff] end is updated to 06
[    0.627389] pci_bus 0000:02: busn_res: can not insert [bus 02-06] under [bus 01] (conflicts with (null) [bus 01])
[    0.627411] pci_bus 0000:02: [bus 02-06] partially hidden behind bridge 0000:01 [bus 01]
[    0.627438] pci 0000:00:00.0: bridge has subordinate 01 but max busn 06
[    0.628877] pci 0000:00:00.0: BAR 0: assigned [mem 0x01000000-0x010fffff]
[    0.628905] pci 0000:00:00.0: BAR 8: assigned [mem 0x01100000-0x014fffff]
[    0.628927] pci 0000:00:00.0: BAR 9: assigned [mem 0x01500000-0x018fffff pref]
[    0.628945] pci 0000:00:00.0: BAR 6: assigned [mem 0x01900000-0x0190ffff pref]
[    0.628962] pci 0000:00:00.0: BAR 7: assigned [io 0x1000-0x4fff]
[    0.628989] pci 0000:01:00.0: BAR 8: assigned [mem 0x01100000-0x014fffff]
[    0.629008] pci 0000:01:00.0: BAR 9: assigned [mem 0x01500000-0x018fffff 64bit pref]
[    0.629024] pci 0000:01:00.0: BAR 7: assigned [io 0x1000-0x4fff]
[    0.629052] pci 0000:02:01.0: BAR 8: assigned [mem 0x01100000-0x011fffff]
[    0.629117] pci 0000:02:01.0: BAR 9: assigned [mem 0x01500000-0x015fffff 64bit pref]
[    0.629140] pci 0000:02:02.0: BAR 8: assigned [mem 0x01200000-0x012fffff]
[    0.629157] pci 0000:02:02.0: BAR 9: assigned [mem 0x01600000-0x016fffff 64bit pref]
[    0.629174] pci 0000:02:03.0: BAR 8: assigned [mem 0x01300000-0x013fffff]
[    0.629193] pci 0000:02:03.0: BAR 9: assigned [mem 0x01700000-0x017fffff 64bit pref]
[    0.629210] pci 0000:02:04.0: BAR 8: assigned [mem 0x01400000-0x014fffff]
[    0.629226] pci 0000:02:04.0: BAR 9: assigned [mem 0x01800000-0x018fffff 64bit pref]
[    0.629242] pci 0000:02:01.0: BAR 7: assigned [io 0x1000-0x1fff]
[    0.629257] pci 0000:02:02.0: BAR 7: assigned [io 0x2000-0x2fff]
[    0.629274] pci 0000:02:03.0: BAR 7: assigned [io 0x3000-0x3fff]
[    0.629290] pci 0000:02:04.0: BAR 7: assigned [io 0x4000-0x4fff]
[    0.629317] pci 0000:03:00.0: BAR 0: assigned [mem 0x01100000-0x0111ffff]
[    0.629357] pci 0000:03:00.0: BAR 3: assigned [mem 0x01120000-0x01123fff]
[    0.629396] pci 0000:03:00.0: BAR 2: assigned [io 0x1000-0x101f]
[    0.629434] pci 0000:02:01.0: PCI bridge to [bus 03]
[    0.629460] pci 0000:02:01.0:   bridge window [io 0x1000-0x1fff]
[    0.629501] pci 0000:02:01.0:   bridge window [mem 0x01100000-0x011fffff]
[    0.629533] pci 0000:02:01.0:   bridge window [mem 0x01500000-0x015fffff 64bit pref]
[    0.629587] pci 0000:04:00.0: BAR 0: assigned [mem 0x01200000-0x0121ffff]
[    0.629626] pci 0000:04:00.0: BAR 3: assigned [mem 0x01220000-0x01223fff]
[    0.629664] pci 0000:04:00.0: BAR 2: assigned [io 0x2000-0x201f]
[    0.629701] pci 0000:02:02.0: PCI bridge to [bus 04]
[    0.629725] pci 0000:02:02.0:   bridge window [io 0x2000-0x2fff]
[    0.629764] pci 0000:02:02.0:   bridge window [mem 0x01200000-0x012fffff]
[    0.629796] pci 0000:02:02.0:   bridge window [mem 0x01600000-0x016fffff 64bit pref]
[    0.629852] pci 0000:05:00.0: BAR 0: assigned [mem 0x01300000-0x0131ffff]
[    0.629893] pci 0000:05:00.0: BAR 3: assigned [mem 0x01320000-0x01323fff]
[    0.629931] pci 0000:05:00.0: BAR 2: assigned [io 0x3000-0x301f]
[    0.629968] pci 0000:02:03.0: PCI bridge to [bus 05]
[    0.629992] pci 0000:02:03.0:   bridge window [io 0x3000-0x3fff]
[    0.630031] pci 0000:02:03.0:   bridge window [mem 0x01300000-0x013fffff]
[    0.630061] pci 0000:02:03.0:   bridge window [mem 0x01700000-0x017fffff 64bit pref]
[    0.630116] pci 0000:06:00.0: BAR 0: assigned [mem 0x01400000-0x0141ffff]
[    0.630155] pci 0000:06:00.0: BAR 3: assigned [mem 0x01420000-0x01423fff]
[    0.630194] pci 0000:06:00.0: BAR 2: assigned [io 0x4000-0x401f]
[    0.630232] pci 0000:02:04.0: PCI bridge to [bus 06]
[    0.630255] pci 0000:02:04.0:   bridge window [io 0x4000-0x4fff]
[    0.630294] pci 0000:02:04.0:   bridge window [mem 0x01400000-0x014fffff]
[    0.630325] pci 0000:02:04.0:   bridge window [mem 0x01800000-0x018fffff 64bit pref]
[    0.630371] pci 0000:01:00.0: PCI bridge to [bus 02-06]
[    0.630394] pci 0000:01:00.0:   bridge window [io 0x1000-0x4fff]
[    0.630433] pci 0000:01:00.0:   bridge window [mem 0x01100000-0x014fffff]
[    0.630463] pci 0000:01:00.0:   bridge window [mem 0x01500000-0x018fffff 64bit pref]
[    0.630511] pci 0000:00:00.0: PCI bridge to [bus 01]
[    0.630525] pci 0000:00:00.0:   bridge window [io 0x1000-0x4fff]
[    0.630543] pci 0000:00:00.0:   bridge window [mem 0x01100000-0x014fffff]
[    0.630558] pci 0000:00:00.0:   bridge window [mem 0x01500000-0x018fffff pref]
[    0.631419] pcieport 0000:00:00.0: Signaling PME through PCIe PME interrupt
[    0.631440] pci 0000:01:00.0: Signaling PME through PCIe PME interrupt
[    0.631454] pci 0000:02:01.0: Signaling PME through PCIe PME interrupt
[    0.631466] pci 0000:03:00.0: Signaling PME through PCIe PME interrupt
[    0.631479] pci 0000:02:02.0: Signaling PME through PCIe PME interrupt
[    0.631490] pci 0000:04:00.0: Signaling PME through PCIe PME interrupt
[    0.631501] pci 0000:02:03.0: Signaling PME through PCIe PME interrupt
[    0.631513] pci 0000:05:00.0: Signaling PME through PCIe PME interrupt
[    0.631524] pci 0000:02:04.0: Signaling PME through PCIe PME interrupt
[    0.631536] pci 0000:06:00.0: Signaling PME through PCIe PME interrupt
[    0.631557] pcie_pme 0000:00:00.0:pcie001: service driver pcie_pme loaded
[    0.632171] aer 0000:00:00.0:pcie002: service driver aer loaded
[    0.632748] pcieport 0000:01:00.0: enabling device (0140 -> 0143)
[    0.633850] pcieport 0000:02:01.0: enabling device (0140 -> 0143)
[    0.635609] pcieport 0000:02:02.0: enabling device (0140 -> 0143)
[    0.637358] pcieport 0000:02:03.0: enabling device (0140 -> 0143)
[    0.639199] pcieport 0000:02:04.0: enabling device (0140 -> 0143)
[    0.645384] imx-sdma 20ec000.sdma: Direct firmware load for imx/sdma/sdma-imx6q.bin failed with error -2
[    0.645412] imx-sdma 20ec000.sdma: external firmware not found, using ROM firmware
[    0.655451] pfuze100-regulator 2-0008: Full layer: 2, Metal layer: 1
[    0.656297] pfuze100-regulator 2-0008: FAB: 0, FIN: 0
[    0.656315] pfuze100-regulator 2-0008: pfuze100 found.
[    0.684061] 2020000.serial: ttymxc0 at MMIO 0x2020000 (irq = 24, base_baud = 5000000) is a IMX
[    2.076139] console [ttymxc0] enabled
[    2.081940] 21e8000.serial: ttymxc1 at MMIO 0x21e8000 (irq = 63, base_baud = 5000000) is a IMX
[    2.092078] 21ec000.serial: ttymxc2 at MMIO 0x21ec000 (irq = 64, base_baud = 5000000) is a IMX
[    2.102164] 21f0000.serial: ttymxc3 at MMIO 0x21f0000 (irq = 65, base_baud = 5000000) is a IMX
[    2.112185] 21f4000.serial: ttymxc4 at MMIO 0x21f4000 (irq = 66, base_baud = 5000000) is a IMX
[    2.122751] [drm] Initialized
[    2.133184] etnaviv gpu-subsystem: bound 134000.gpu (ops gpu_ops)
[    2.139395] etnaviv gpu-subsystem: bound 130000.gpu (ops gpu_ops)
[    2.145511] etnaviv-gpu 134000.gpu: model: GC320, revision: 5007
[    2.197842] etnaviv-gpu 130000.gpu: model: GC880, revision: 5106
[    2.253648] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[    2.260357] [drm] No driver support for vblank timestamp query.
[    2.267048] imx-drm display-subsystem: bound imx-ipuv3-crtc.2 (ops ipu_crtc_ops)
[    2.274860] imx-drm display-subsystem: bound imx-ipuv3-crtc.3 (ops ipu_crtc_ops)
[    2.282326] imx-drm display-subsystem: No connectors reported connected with modes
[    2.289932] [drm] Cannot find any crtc or sizes - going 1024x768
[    2.307679] Console: switching to colour frame buffer device 128x48
[    2.318925] imx-drm display-subsystem: fb0: frame buffer device
[    2.326384] imx-ipuv3 2400000.ipu: IPUv3H probed
[    2.359641] brd: module loaded
[    2.379814] loop: module loaded
[    2.388317] libphy: Fixed MDIO Bus: probed
[    2.393496] CAN device driver interface
[    2.397754] 2090000.flexcan supply xceiver not found, using dummy regulator
[    2.407036] flexcan 2090000.flexcan: device registered (reg_base=f1088000, irq=28)
[    2.414983] 2094000.flexcan supply xceiver not found, using dummy regulator
[    2.423721] flexcan 2094000.flexcan: device registered (reg_base=f1090000, irq=29)
[    2.432876] 2188000.ethernet supply phy not found, using dummy regulator
[    2.443364] pps pps0: new PPS source ptp0
[    2.448503] libphy: fec_enet_mii_bus: probed
[    2.457315] fec 2188000.ethernet eth0: registered PHC device 0
[    2.463614] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[    2.469508] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[    2.475698] e1000e 0000:03:00.0: enabling device (0140 -> 0142)
[    2.482211] e1000e 0000:03:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
[    2.491719] e1000e 0000:03:00.0 0000:03:00.0 (uninitialized): Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.
[    2.570239] e1000e 0000:03:00.0 0000:03:00.0 (uninitialized): registered PHC clock
[    2.656993] e1000e 0000:03:00.0 eth1: (PCI Express:2.5GT/s:Width x1) 00:e0:81:55:f2:01
[    2.664977] e1000e 0000:03:00.0 eth1: Intel(R) PRO/1000 Network Connection
[    2.671903] e1000e 0000:03:00.0 eth1: MAC: 3, PHY: 8, PBA No: 123456-003
[    2.678970] e1000e 0000:04:00.0: enabling device (0140 -> 0142)
[    2.685407] e1000e 0000:04:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
[    2.694855] e1000e 0000:04:00.0 0000:04:00.0 (uninitialized): Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.
[    2.770197] e1000e 0000:04:00.0 0000:04:00.0 (uninitialized): registered PHC clock
[    2.856702] e1000e 0000:04:00.0 eth2: (PCI Express:2.5GT/s:Width x1) 00:e0:81:55:f2:01
[    2.864679] e1000e 0000:04:00.0 eth2: Intel(R) PRO/1000 Network Connection
[    2.871605] e1000e 0000:04:00.0 eth2: MAC: 3, PHY: 8, PBA No: 123456-003
[    2.878490] e1000e 0000:05:00.0: enabling device (0140 -> 0142)
[    2.884912] e1000e 0000:05:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
[    2.894354] e1000e 0000:05:00.0 0000:05:00.0 (uninitialized): Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.
[    2.970134] e1000e 0000:05:00.0 0000:05:00.0 (uninitialized): registered PHC clock
[    3.056678] e1000e 0000:05:00.0 eth3: (PCI Express:2.5GT/s:Width x1) 00:e0:81:55:f2:01
[    3.064653] e1000e 0000:05:00.0 eth3: Intel(R) PRO/1000 Network Connection
[    3.071584] e1000e 0000:05:00.0 eth3: MAC: 3, PHY: 8, PBA No: 123456-003
[    3.078471] e1000e 0000:06:00.0: enabling device (0140 -> 0142)
[    3.084888] e1000e 0000:06:00.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode
[    3.094334] e1000e 0000:06:00.0 0000:06:00.0 (uninitialized): Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.
[    3.170122] e1000e 0000:06:00.0 0000:06:00.0 (uninitialized): registered PHC clock
[    3.256691] e1000e 0000:06:00.0 eth4: (PCI Express:2.5GT/s:Width x1) 00:e0:81:55:f2:01
[    3.264666] e1000e 0000:06:00.0 eth4: Intel(R) PRO/1000 Network Connection
[    3.271596] e1000e 0000:06:00.0 eth4: MAC: 3, PHY: 8, PBA No: 123456-003
[    3.278488] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
[    3.285052] ehci-pci: EHCI PCI platform driver
[    3.289693] ehci-platform: EHCI generic platform driver
[    3.295378] ehci-mxc: Freescale On-Chip EHCI Host driver
[    3.300935] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
[    3.307168] ohci-pci: OHCI PCI platform driver
[    3.311802] ohci-platform: OHCI generic platform driver
[    3.330288] using random self ethernet address
[    3.334792] using random host ethernet address
[    3.339475] ci_hdrc ci_hdrc.0: EHCI Host Controller
[    3.344541] ci_hdrc ci_hdrc.0: new USB bus registered, assigned bus number 1
[    3.353574] usb0: HOST MAC da:23:d6:00:a3:06
[    3.357915] usb0: MAC 26:f9:3d:47:7c:74
[    3.362735] using random self ethernet address
[    3.367203] using random host ethernet address
[    3.372352] g_ether gadget: Ethernet Gadget, version: Memorial Day 2008
[    3.378985] g_ether gadget: g_ether ready
[    3.384025] mousedev: PS/2 mouse device common for all mice
[    3.389731] ci_hdrc ci_hdrc.0: USB 2.0 started, EHCI 1.00
[    3.401723] snvs_rtc 20cc000.snvs:snvs-rtc-lp: rtc core: registered 20cc000.snvs:snvs-r as rtc0
[    3.412148] hub 1-0:1.0: USB hub found
[    3.416144] hub 1-0:1.0: 1 port detected
[    3.420408] i2c /dev entries driver
[    3.428267] IR NEC protocol handler initialized
[    3.432940] IR RC5(x/sz) protocol handler initialized
[    3.438009] IR RC6 protocol handler initialized
[    3.442584] IR JVC protocol handler initialized
[    3.447129] IR Sony protocol handler initialized
[    3.451920] IR SANYO protocol handler initialized
[    3.456643] IR Sharp protocol handler initialized
[    3.461391] IR MCE Keyboard/mouse protocol handler initialized
[    3.467240] IR XMP protocol handler initialized
[    3.474966] coda 2040000.vpu: unable to alloc iram
[    3.480547] coda 2040000.vpu: Direct firmware load for vpu_fw_imx6d.bin failed with error -2
[    3.494916] imx2-wdt 20bc000.wdog: timeout 60 sec (nowayout=0)
[    3.501117] coda 2040000.vpu: Direct firmware load for v4l-coda960-imx6dl.bin failed with error -2
[    3.510157] coda 2040000.vpu: firmware request failed
[    3.516431] sdhci: Secure Digital Host Controller Interface driver
[    3.522680] sdhci: Copyright(c) Pierre Ossman
[    3.527046] sdhci-pltfm: SDHCI platform and OF driver helper
[    3.535936] sdhci-esdhc-imx 2190000.usdhc: Got CD GPIO
[    3.599509] mmc0: SDHCI controller on 2190000.usdhc [2190000.usdhc] using ADMA
[    3.613692] caam 2100000.caam: Entropy delay = 3200
[    3.618612] caam 2100000.caam: Instantiated RNG4 SH0
[    3.679376] caam 2100000.caam: Instantiated RNG4 SH1
[    3.684462] caam 2100000.caam: device ID = 0x0a16010000000100 (Era 4)
[    3.690953] caam 2100000.caam: job rings = 2, qi = 0
[    3.731930] caam algorithms registered in /proc/crypto
[    3.742818] caam_jr 2101000.jr0: registering rng-caam
[    3.749951] usbcore: registered new interface driver usbhid
[    3.755572] usbhid: USB HID core driver
[    3.762539] kdsa_fpanel front-panel: panel 16 skins number
[    3.768085] kdsa_fpanel front-panel: panel 1 first skin delay
[    3.773914] kdsa_fpanel front-panel: panel Digits-0-1 find success.
[    3.780225] kdsa_fpanel front-panel: panel Digits-2-3 find success.
[    3.786503] kdsa_fpanel front-panel: panel Status-leds find success.
[    3.797175] mmc0: host does not support reading read-only switch, assuming write-enable
[    3.811445] mmc0: new high speed SDHC card at address 0007
[    3.819177] fpanel_chip_add: panel : (NFT KDSA Panel)
[    3.824802] mmcblk0: mmc0:0007 SL16G 14.5 GiB
[    3.830298] kdsa_fpanel front-panel: panel create sysfs group : 0
[    3.836408] fpanel_chip_add: panel registered on device: NFT KDSA Panel
[    3.843076] kdsa_fpanel front-panel: Probe OK
[    3.850847] mmcblk0: p1 p2
[    3.868832] NET: Registered protocol family 10
[    3.877442] sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver
[    3.885693] NET: Registered protocol family 17
[    3.890243] can: controller area network core (rev 20120528 abi 9)
[    3.896949] NET: Registered protocol family 29
[    3.901478] can: raw protocol (rev 20120528)
[    3.905850] can: broadcast manager protocol (rev 20161123 t)
[    3.911993] can: netlink gateway (rev 20130117) max_hops=1
[    3.918391] Key type dns_resolver registered
[    3.928063] Registering SWP/SWPB emulation handler
[    3.978011] imx_thermal 2000000.aips-bus:tempmon: Extended Commercial CPU temperature grade - max:105C critical:100C passive:95C
[    3.991816] snvs_rtc 20cc000.snvs:snvs-rtc-lp: setting system clock to 1970-01-01 00:00:00 UTC (0)
[    4.001582] SWBST: disabling
[    4.004522] VGEN2: disabling
[    4.008372] ALSA device list:
[    4.011420]   No soundcards found.
[    4.026109] EXT4-fs (mmcblk0p2): couldn't mount as ext3 due to feature incompatibilities
[    4.134914] random: fast init done
[    4.534649] ci_hdrc ci_hdrc.0: remove, state 4
[    4.545400] usb usb1: USB disconnect, device number 1
[    4.584093] ci_hdrc ci_hdrc.0: USB bus 1 deregistered
[   16.420613] EXT4-fs (mmcblk0p2): recovery complete
[   16.447937] EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
[   16.456659] VFS: Mounted root (ext4 filesystem) on device 179:2.
[   16.475347] devtmpfs: mounted
[   16.482519] Freeing unused kernel memory: 1024K (c0d00000 - c0e00000)
[   17.116627] udevd[176]: starting version 3.2
[   17.170555] udevd[177]: starting eudev-3.2
[   17.644649] EXT4-fs (mmcblk0p2): re-mounted. Opts: data=ordered
[   19.740215] micrel in fiber mode
[   19.743539] micrel disable MDI/MDIx
[   19.747455] Micrel KSZ8001 or KS8721 2188000.ethernet:19: attached PHY driver [Micrel KSZ8001 or KS8721] (mii_bus:phy_addr=2188000.ethernet:19, irq=-1)
[   19.763523] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
[   23.310878] IPv6: ADDRCONF(NETDEV_UP): eth1: link is not ready
[   26.240391] e1000e: eth1 NIC Link is Up 100 Mbps Full Duplex, Flow Control: None
[   26.247968] e1000e 0000:03:00.0 eth1: 10/100 speed: disabling TSO
[   26.264278] IPv6: ADDRCONF(NETDEV_CHANGE): eth1: link becomes ready
r

Re: IMX6 PCI with external cloks

maxmar — Mon, 03 Jul 2017 14:42:47 GMT

I use a custom board with Tq module.

Re: IMX6 PCI with external cloks

maxmar — Mon, 03 Jul 2017 17:16:50 GMT

With some debug I see that the problem is caused by the IMX6QDL_CLK_SATA_REF_100M in dts file and the code in the pci-imx6.c.

If I add in the dts file only the options fot pll6 bypass the kernel start.

clocks {
anaclk1 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <100000000>; /* 100MHz */
};
};

&clks {
assigned-clocks = <&clks IMX6QDL_PLL6_BYPASS_SRC>,
<&clks IMX6QDL_PLL6_BYPASS>;
assigned-clock-parents = <&clks IMX6QDL_CLK_LVDS1_IN>,
<&clks IMX6QDL_PLL6_BYPASS_SRC>;
assigned-clock-rates = <100000000>, <100000000>;
};

Where is the correct value of the register CCM_ANALOG_PLL_ENET ? with the program devregs I see the value 0x97001

Re: IMX6 PCI with external cloks

alfredk — Tue, 04 Jul 2017 17:58:42 GMT

Hello

In dts files for this board SATA module enabled?

CCM_ANALOG_PLL_ENET contains an invalid value.. Can you send your files dts for viewing?

Regards,

Alfred.

Re: IMX6 PCI with external cloks

maxmar — Wed, 05 Jul 2017 10:40:58 GMT

Hello,

SATA module is enabled. I attached the dts file.

Thank you for your support.

Re: IMX6 PCI with external cloks

alfredk — Wed, 05 Jul 2017 17:39:27 GMT

Hello.

If the configuration allows. Try downloading with SATA off. So we will probably solve the problem

Alfred

Re: IMX6 PCI with external cloks

maxmar — Thu, 06 Jul 2017 11:35:49 GMT

Unfortunately SATA is mandatory for this application. Whre is the correct value for CCM_ANALOG_PLL_ENET ?

Re: IMX6 PCI with external cloks

alfredk — Thu, 06 Jul 2017 15:26:45 GMT

Hello!

Correct values is 0x80016002, 0x16002 and so on. See brief from Charle Powe i.MX6Q: Using an external reference for PCIe

Here is more detailed. The main bits as indicated are BYPASS_CLK_SRC (bits [15:14]) and BYPASS bit (bit 16).

And see for board clk info : /sys/kernel/debug/clk/clk_summary table-file.

Alfred.

Re: IMX6 PCI with external cloks

peteramond — Wed, 07 Nov 2018 10:12:38 GMT

Hi alfredlatypov

Hi YuriMuhin_ng

My custom hardware is based on nitrogen 6 max development board. I'm using Kernel - Linux-boundary 4.1.15. I used following hardware pull down configuration for PCIE clk. But I'm getting PCIE link up problems for each and every hardware in different manner, some hardware working well. Are you aware about nitrogen 6 max uboot and above kernel ?

According to your above description I could edit my imx6qdl.dtsi file. Attached here with.

But I couldn't find a place to add clock dependents. I managed to add it to imx6qdl-nitrogen6_max.dtsi file attached here with. Could you please tell me whether it's correct or not ?

And also the file you have mentioned pci-imx6.c is different from the kernel I'm using (Attached here with). Is that okay to replace completely that file ? Can you describe how this should edit according to my kernel ?

I just edit the dtsi files and ran kernel. Then kernel shows pcie ref clk as 250MHz. Why is that ? Will that correct after changing pcie-imx6.c driver file ?

Regards,

Peter.

Re: IMX6 PCI with external cloks

alfredk — Thu, 08 Nov 2018 16:37:45 GMT

Hello Peter.

Only in case you use external bus clocking

Add to base imx6qdl.dtsi to clocks section anaclk1 clock source :

clocks {

....

anaclk1 {
                        compatible = "fixed-clock";
                        reg = <0>;
                        #clock-cells = <0>;
                        clock-frequency = <100000000>; /* 100MHz */
                };

...

}

This section adds clock source to IMX6QDL_CLK_ANACLK1 in clocks array.

see initialization code in drivers/clk/imx/clk-imx6q.c from kernel source tree.

The frequency for the solution I proposed will not be displayed correctly.

In section pcie must be activated SATA_REF

clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
<&clks IMX6QDL_CLK_LVDS1_IN>,
<&clks IMX6QDL_CLK_SATA_REF_100M>;

Otherwise, external clocking will not work.

Alfred Latypov

Re: IMX6 PCI with external cloks

peteramond — Fri, 09 Nov 2018 10:56:00 GMT

Hi alfredlatypov

Thank you very much for your reply.

1) If I'm not using external clocks are there any method to change PCIE clock ? My board is showing PCIE clock 125MHz. What is the correct clock PCIE clock for imx6q ? Can we change it to 100MHz with out using external clocks ?

2) My custom hardware is based on nitrogen 6 max development board. I’m using Kernel – Linux-boundary 4.1.15 I’m using nitrogen 6 max uboot. What is the PCIE clock frequency for this hardware(Nitrogen 6 max) ? From where we take PCIE clock ? Is that from SATA ? If I need to get PCIE clock from SATA what should I do for dtsi and uboot ?

3) Both SATA and PCIE are getting clocks from LVDS clock source ?

4) When I add following changes my pcie clock shows 250MHz. Why is that ?

...

}

clocks = <&clks IMX6QDL_CLK_PCIE_AXI>,
<&clks IMX6QDL_CLK_LVDS1_IN>,
<&clks IMX6QDL_CLK_SATA_REF_100M>;

Regards,

Peter.

Re: IMX6 PCI with external cloks

alfredk — Fri, 09 Nov 2018 16:42:15 GMT

Hello Peter.

1) 125 MHz is the correct frequency for reference input. Standard files from your board should ensure normal operation, provided one endpoint is connected.

2) Using an internal clock can cause problems with external devices. For example when using the PCI bridges.

see IMX6SDLRM 50.5.1.2 Reference Clock Frequency Selection.

In my case, it was not possible to use internal clocking when connecting endpoints through the bridge.

At the same time, when one endpoint was connected, everything worked smoothly.

3) I did not check, but judging by the previous post no

4) When designing the kernel, such a clocking case was not taken into account. What you see in the clock branch of the kernel is calculated values, and not measured.

Alfred.