topic IPU_CSI0_MUX Configuration in i.MX Processors

IPU_CSI0_MUX Configuration

anjojohn — Thu, 22 Dec 2016 07:10:43 GMT

Hi all,

I have a mipi sensor connecting to imx6Duallite. I have read the i.MX6SDL Reference Manual and came across IOMUXC_GPR13 bits 0-2 and 3-5 for IPU_CSI0_MUX and IPU_CSI1_MUX. In wand-board i see only the IPU_CSI0 configured. I don't understand how this configuration is done. Could any one please explain whats these terms meant

MIPI CSI0
MIPI CSI1
MIPI CSI2
MIPI CSI3
IPU CSI1

and how to set the virtual channel configuration

Re: IPU_CSI0_MUX Configuration

Yuri — Thu, 22 Dec 2016 08:48:42 GMT

Hello,

Hope the following app note helps.

"MIPI–CSI2 Peripheral on i.MX6 MPUs"

< http://www.nxp.com/assets/documents/data/en/application-notes/AN5305.pdf >

Have a great day,

Yuri

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Re: IPU_CSI0_MUX Configuration

anjojohn — Thu, 22 Dec 2016 09:58:49 GMT

Hi Yuri,

Thank you for the document. I understand the IOMUXC_GPR1 for IMX6dual/quad. But i don't understand for imx6solo/dualite. IOMUXC_GPR13 register is confusing. what meant by MIPI CSI0, Route MIPI to IPU1 CSI0 ? If it is that then what is MIPI CSI3 and MIPI CSI2. I didn't see any CSI3 or CSI2 input ports. Also is this IPU CSI1 parallel input selection ?

Re: IPU_CSI0_MUX Configuration

Yuri — Wed, 28 Dec 2016 07:51:55 GMT

Hello,

Please refer to the following https://community.nxp.com/docs/DOC-94312

Regards,

Yuri.