topic Re: How to enable pcie port in imx6q sabreauto. in i.MX Processors

How to enable pcie port in imx6q sabreauto.

shivakumar — Thu, 13 Oct 2016 11:21:29 GMT

How to enable pcie port in imx6q sabreauto. I am trying with fsl-yocto-3.14.28-1.0.0 release.

In tried enabling in Bus support -> PCI Express Port Bus support. But am getting compilation errors. I wanted to know if the PCIe is supported in this release of freescale linux yocto release.

Re: How to enable pcie port in imx6q sabreauto.

Yuri — Fri, 14 Oct 2016 03:44:40 GMT

Hello,

Please check Your configuration, using sections 42.2.2 (Kernel Configurations)

and 42.4 (Using PCIe Endpoint and Running Tests) of “i.MX_6_Linux_Reference_Manual.pdf”

in Linux documentation.

http://www.nxp.com/webapp/Download?colCode=L3.14.28_1.0.0_LINUX_DOCS&Parent_nodeId=1337699481071706174845&Parent_pageTyp…

Have a great day,

Yuri

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Re: How to enable pcie port in imx6q sabreauto.

shivakumar — Wed, 19 Oct 2016 10:21:18 GMT

Hi Yuri Muhin,

Thanks for the response. I followed the reference manual and rebuilt the kernel. Now how to re-generate xxx.sdcard image with this kernel. ?

If replace only kernel image and dtb files the kernel is not booting up. So i just want to regenerate the xxx.sdcard image so that i can flash the complete image on to SD card and try. Is there any quick step I can follow to do this. As you might be knowing rebuilding the complete image will take lot of time.

-Regards,

Shiva Kumar

Re: How to enable pcie port in imx6q sabreauto.

Yuri — Thu, 20 Oct 2016 02:25:14 GMT

Hello,

Please look at section 3 (Cleaning and building again with the
new configuration) of the following thread

Building Linux Kernel

Images (including .sdcard) may be found in directory such as :

build_mx6/tmp/deploy/images

Also, I hope, the following helps.

https://community.nxp.com/docs/DOC-95252

Regards,

Yuri.

Re: How to enable pcie port in imx6q sabreauto.

shivakumar — Fri, 28 Oct 2016 05:32:40 GMT

Hi Yuri Muhin,

I followed your suggestions and also "i.MX_6_Linux_Reference_Manual.pdf” to rebuild the kernel after enabling PICe. But still i see below error logs from the boot up logs.

imx6q-pcie 1ffc000.pcie: phy link never came up
imx6q-pcie 1ffc000.pcie: Failed to bring link up!
imx6q-pcie 1ffc000.pcie: failed to initialize host
imx6q-pcie: probe of 1ffc000.pcie failed with error -22

What can be wrong here.

Re: How to enable pcie port in imx6q sabreauto.

Yuri — Fri, 28 Oct 2016 06:10:57 GMT

Hello,

Does PCIe clock configuration meet recommendations of the Design Checklist ?

From HW Design Checking List for i.Mx6DQSDL Rev2.9 :

"Due to CLKx_P/N is LVDS port and don't match with PCIe reference clock specification.
For PCIe Gen1 application, following low cost solution can be used(DC bias and AC impedance should be
considered). Please refer to "HW Design Checking List for i.Mx6DQSDL Rev2.9.xlsx", sheet "Schematic",
Ref12 for more info."

"PCIe reference clock solution which provided by CLKx_N/P of i.MX6 chip can't pass PCIe
Gen2 compliance test. Recommend using external PCIe 2.0/3.0 clock generator with 2 HCSL outputs
solution. One clock channel connect to i.MX6 as a reference input, please click
Ref14 ("HW Design Checking List for i.Mx6DQSDL Rev2.9.xlsx") for reference circuit.
Another clock channel should connect to PCIe connector, please contact generator vendor for detailed
design guide."

< https://community.freescale.com/docs/DOC-93819 >

Regards,

Yuri.

Re: How to enable pcie port in imx6q sabreauto.

shivakumar — Fri, 28 Oct 2016 06:14:43 GMT

and below is my board info..

CPU: Freescale i.MX6Q rev1.1 at 792 MHz
CPU: Temperature 31 C, calibration data: 0x55d4ac7d
Reset cause: POR
Board: MX6-Sabreauto revB

Re: How to enable pcie port in imx6q sabreauto.

shivakumar — Fri, 28 Oct 2016 06:31:28 GMT

Is there a kernel patch which can enable reference clock for PCIe here. I was just wondering, if we can fix that way.

-Shiva

Re: How to enable pcie port in imx6q sabreauto.

Yuri — Fri, 28 Apr 2017 07:18:56 GMT

Hello,

please try the recent BSP - at least to check recent patches.

Regards,

Yuri.