topic Re: IPU Display Interface Signal Mapping in i.MX Processors

IPU Display Interface Signal Mapping

robertspriggs — Tue, 20 Dec 2016 16:02:41 GMT

In the document "i.MX 6Solo/6DualLite Applications Processors for Consumer Products"

https://cache.freescale.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf

Section 4.11.10.4 IPU Display Interface Signal Mapping, table 65 on page 95:

Where can I find a description of how to set up the IPU registers to change the output pixel format?

Re: IPU Display Interface Signal Mapping

igorpadykov — Tue, 20 Dec 2016 23:48:50 GMT

Hi Robert

please refer to sect.38.4.7.5.1 Bus Mapping Unit i.MX6SDL ReferenceManual

http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SDLRM.pdf

Best regards
igor
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Re: IPU Display Interface Signal Mapping

robertspriggs — Thu, 22 Dec 2016 15:26:15 GMT

Thanks Igor,

That's exactly what I was looking for! I now have the LDB driver working with my custom parallel display.