i.MX Processorsのトピックparallel RGB data enable in imx6

parallel RGB data enable in imx6

redwanmohamed — Sat, 17 Sep 2016 13:39:44 GMT

We have used DI0_PIN4 pad in our design for data enable signal for the parallel RGB interface, which we have configured as below in the dts (but not getting data enable signal as expected)

MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04

I was going through the IMX6DQCEC.pdf which says IPUx_DIx_PIN15 as data enable signal. Please advice whether we can use IPUx_DIx_PIN4 as data enable or not

Re: parallel RGB data enable in imx6

Yuri — Mon, 19 Sep 2016 06:37:17 GMT

Hello,

Please refer to the following

https://community.nxp.com/message/339428

Have a great day,
Yuri

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