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    <title>i.MX ProcessorsのトピックRe: iMX6SL Unable Boot from eMMC</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624576#M94792</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please look at my comments regarding the issue.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; There is unpublished yet i.MX6 SL boot issue ERR007926/7ROM - 32 kHz&lt;BR /&gt; internal oscillator timing inaccuracy may affect SD/MMC and OneNAND boot. One can use the recent i.MX6 SL rev. 1.3 to avoid it or apply the following workarounds :&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; 1.1. Extend the assertion of POR_B until the 32 kHz crystal oscillator is running and stable.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; 1.2. Provide an external stable 32 kHz clock input prior to de-assertion of POR_B.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please try do not use the eMMC fast boot option (BOOT_CFG1[4] = 0). Then the eMMC card will be reset by the software command (CMD0).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Is LPDDR2 frequency low / equal 400 MHz in boot configuration ? &lt;BR /&gt;More high frequencies are not supported . Is the recent i.MX6SL LPDDR2&lt;BR /&gt;Register Programming Aid used for memory initialization sequence ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="105968" data-objecttype="102" href="https://community.nxp.com/docs/DOC-105968"&gt;https://community.nxp.com/docs/DOC-105968&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;4.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Did you make the change to mmc.c and recompile u-boot (as per the mention in DOC-332187)?&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;“EMMC 5.0 and EMMC 5.1 work on i.MX6”&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="332187" data-objecttype="102" href="https://community.nxp.com/docs/DOC-332187"&gt;https://community.nxp.com/docs/DOC-332187&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Is U-boot prepared for eMMC ? Please refer to section 5.5 (U-Boot configuration) of “i.MX_Yocto_Project_User's_Guide.pdf”.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&amp;nbsp; As for boot partition, please look at section 4.7.1 (Running Linux OS from MMC/SD) of &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;“i.MX_Linux_User's_Guide.pdf”. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fwebapp%2FDownload%3FcolCode%3DL4.1.15_2.0.0-LINUX-DOCS" rel="nofollow" target="_blank"&gt;http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0-LINUX-DOCS&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 14 Feb 2017 05:58:56 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2017-02-14T05:58:56Z</dc:date>
    <item>
      <title>iMX6SL Unable Boot from eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624574#M94790</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everyone,&amp;nbsp;&lt;/P&gt;&lt;P&gt;We finally succeeded to load the Kernel. We’re also able to turn our device to Mass Storage mode and flash the U-Boot, Kernel and System Files to eMMC (we made Porting BSP from IMX6SL-EVK to our custom board).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our custom board had PF3000 PMIC (instead of PF0100 as on IMX6SL-EVK board), LPDDR2 8Gb and eMMC v5.0 4GB (Micron MTFC4GACAJCN-1M WT) as boot memory device on USDHC2 port (instead of SD-card slot, that doesn’t exist on our board). On our board we don’t have access to BOOT_CFG GPIOs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our next stage was to programming the eFUSEs to boot from the eMMC. We use MFGTool to load and write the U-Boot, Kernel and File System to the eMMC but we unable to boot from the eMMC. We tried to set the eFuse (CFG1 &amp;amp; CFG2) as following:&lt;BR /&gt;Once with the value 0xC870 (Board 1) –&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG1[4]=1 Fast Boot Support: Fast Boot &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG1[3:2]=00 MMC Speed Mode: High Speed Mode &lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;eMMC Fast Boot Acknowledge enable&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[7:5]=110 Bus Width: 8-bit DDR (MMC 4.4)&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[4:3]=01 Port Select: USDHC2&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[2]=0 Boot Frequencies: 792/400 MHz&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[1]=0 SD2 Voltage Selection 3.3V&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And once (on another identical board) with the value 0x4860 (Board 2) – &lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG1[4]=0 Fast Boot Support: Normal Boot &lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG1[3:2]=00 MMC Speed Mode: High Speed Mode &lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;eMMC Fast Boot Acknowledge enable&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[7:5]=010 Bus Width: 8-bit&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[4:3]=01 Port Select: USDHC2&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[2]=0 Boot Frequencies: 792/400 MHz&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;BOOT_CFG2[1]=0 SD2 Voltage Selection 3.3V&lt;/P&gt;&lt;P&gt;In both cases we unable to boot at power up! We don’t see any response on terminal screen (UART1 Port). In first case, the device turns to HID-Compliant Device after about 20sec. It seems like a CPU and eMMC tried to communicate on a power-up stage. We also see the CMD line (between MCU and eMMC) going from high to low after 83 usec and activity on CLK line in about 3 sec (at 50MHz frequency).&lt;BR /&gt;In second case, our board jumps immediately to HID-Compliant Device and there is no activity on CLK line and the CMD line never goes high. &lt;BR /&gt;&lt;STRONG&gt;Q(1): May it occurred as result of incorrect eFUSE programming?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;We also tried to configure the PARTITION_CONFIG Register (EXT_CSD [179]) from MFGTool U-Boot command line as following:&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;=&amp;gt; mmc partconf 0 1 1 1&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;‘0’ – mmc0 device&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;First ‘1’ (from left) - BOOT_ACK: Boot acknowledge sent during boot operation&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Second ‘1’ - BOOT_PARTITION_ENABLE: Boot from boot partition 1&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Third ‘1’ - PARTITION_ACCESS: R/W boot partition 1&lt;BR /&gt;&amp;nbsp;&amp;nbsp;We noticed that this register is configured from emmc.c file with same configuration (after some debugging). But we still can’t boot from eMMC on power up.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, on both boards we managed to boot the kernel from the eMMC after booting from MFGTool and using “boot” command from the MFGTool’s U-Boot command line. It seems like we have only issue with U-Boot booting from eMMC. &lt;BR /&gt;&lt;STRONG&gt;Q(2): Is this claim is true?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the facts that we able to boot Kernel from eMMC (through MFGTool’s U-Boot) and have the ability to write and read from the eMMC eliminating the possibility of lack/fault of communication between iMX6 and eMMC. &lt;BR /&gt;&lt;STRONG&gt;Q(3): Is this claim is true?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Q(4): Does it mean that it impossible to boot with eMMC v5.0? Or it’s something else that we’re missing?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Q(5): What can be reason for the disability of booting from eMMC in our case?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;As I mentioned, we stacked at boot from eMMC stage and we don't have any idea what can be reason for this issue. It seems like that we performed all steps correctly.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 11 Feb 2017 21:44:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624574#M94790</guid>
      <dc:creator>yakovshaulov</dc:creator>
      <dc:date>2017-02-11T21:44:56Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6SL Unable Boot from eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624575#M94791</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Update:&lt;/P&gt;&lt;P&gt;I think we're realized what can be the source of the problem. We used mmc-utils on kernel with next command:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;SPAN style="color: #808080;"&gt;mmc extcsd read /dev/mmcblk0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;This command shows values of all eMMC registers. One of those registers is a PARTION_CONFIG. So we found that the value of this register is 0x48:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;SPAN style="color: #808080;"&gt;Boot configuration bytes [PARTITION_CONFIG: 0x48]&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #808080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;Boot Partition 1 enabled&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN style="color: #808080;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;STRONG&gt;No access to boot partition&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;So, it seems like this is the source of disability to boot from eMMC. Is it right?&amp;nbsp;&lt;/P&gt;&lt;P&gt;As we understood the value of this register should be 0x49 in order to get access to to boot partition.&amp;nbsp;&lt;/P&gt;&lt;P&gt;So we tried to configure this register, but there is only &lt;EM&gt;boot_partition&lt;/EM&gt;, &lt;EM&gt;send_ack&lt;/EM&gt; and &lt;EM&gt;device&lt;/EM&gt; bits that we can change:&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;mmc bootpart enable &amp;lt;boot_partition&amp;gt; &amp;lt;send_ack&amp;gt; &amp;lt;device&amp;gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;Enable the boot partition for the &amp;lt;device&amp;gt;.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp;To receive acknowledgment of boot from the card set &amp;lt;send_ack&amp;gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; to 1, else set it to 0.&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #000000;"&gt;No PARTITION_ACCESS bit is present in this function, so we unable to change it to &amp;nbsp;&lt;EM&gt;R/W boot partition 1&lt;/EM&gt; value.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="color: #000000;"&gt;I want to note&amp;nbsp;that we can change the value of the register, but only&amp;nbsp;&lt;SPAN style="background-color: #ffffff;"&gt;&lt;EM&gt;boot_partition&lt;/EM&gt; and&amp;nbsp;&lt;EM&gt;send_ack&lt;/EM&gt; bits.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;&lt;SPAN style="background-color: #ffffff; color: #000000;"&gt;Is there a way to modify this register and whether it will solve our problem?&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 12 Feb 2017 16:48:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624575#M94791</guid>
      <dc:creator>yakovshaulov</dc:creator>
      <dc:date>2017-02-12T16:48:46Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6SL Unable Boot from eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624576#M94792</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please look at my comments regarding the issue.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; There is unpublished yet i.MX6 SL boot issue ERR007926/7ROM - 32 kHz&lt;BR /&gt; internal oscillator timing inaccuracy may affect SD/MMC and OneNAND boot. One can use the recent i.MX6 SL rev. 1.3 to avoid it or apply the following workarounds :&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; 1.1. Extend the assertion of POR_B until the 32 kHz crystal oscillator is running and stable.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; 1.2. Provide an external stable 32 kHz clock input prior to de-assertion of POR_B.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Please try do not use the eMMC fast boot option (BOOT_CFG1[4] = 0). Then the eMMC card will be reset by the software command (CMD0).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;3.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Is LPDDR2 frequency low / equal 400 MHz in boot configuration ? &lt;BR /&gt;More high frequencies are not supported . Is the recent i.MX6SL LPDDR2&lt;BR /&gt;Register Programming Aid used for memory initialization sequence ?&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="105968" data-objecttype="102" href="https://community.nxp.com/docs/DOC-105968"&gt;https://community.nxp.com/docs/DOC-105968&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;4.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Did you make the change to mmc.c and recompile u-boot (as per the mention in DOC-332187)?&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;“EMMC 5.0 and EMMC 5.1 work on i.MX6”&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="332187" data-objecttype="102" href="https://community.nxp.com/docs/DOC-332187"&gt;https://community.nxp.com/docs/DOC-332187&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Is U-boot prepared for eMMC ? Please refer to section 5.5 (U-Boot configuration) of “i.MX_Yocto_Project_User's_Guide.pdf”.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&amp;nbsp; As for boot partition, please look at section 4.7.1 (Running Linux OS from MMC/SD) of &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;“i.MX_Linux_User's_Guide.pdf”. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; &lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;SPAN&gt;&amp;lt; &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fwebapp%2FDownload%3FcolCode%3DL4.1.15_2.0.0-LINUX-DOCS" rel="nofollow" target="_blank"&gt;http://www.nxp.com/webapp/Download?colCode=L4.1.15_2.0.0-LINUX-DOCS&lt;/A&gt;&lt;SPAN&gt; &amp;gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Feb 2017 05:58:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624576#M94792</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2017-02-14T05:58:56Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6SL Unable Boot from eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624577#M94793</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Unfortunately I didn't get the answers to my questions, but only general&amp;nbsp;recommendations for solving "Booting from eMMC" problem.&lt;/P&gt;&lt;P&gt;However, we double checked your comments and that is what we have:&lt;/P&gt;&lt;P&gt;1.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1.1: We can't extend the assertion of POR_B cause this signal is drives by PF3000 PMIC and the assertion time can't &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; be modified.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;1.2: We do provide stable 32.768 KHz clock.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;We also tried to extend the assertion time manually (by connecting the POR_B signal to GND for about 1 sec at &amp;nbsp;&amp;nbsp;&amp;nbsp;power-&amp;nbsp;up) but it didn't help at all.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2. We used the FAST Boot option only once (on board 1 - see my comments above on this post). On the other cases, we used &amp;nbsp;once &lt;STRONG&gt;Normal BOOT&lt;/STRONG&gt; with &lt;STRONG&gt;8-bit&lt;/STRONG&gt; Bus width and once &lt;STRONG&gt;Normal BOOT&lt;/STRONG&gt; with &lt;STRONG&gt;8-bit DDR&lt;/STRONG&gt; Bus Width. We don't see any response from any of this options. However, in first case we saw CLK activity for about 3 sec (as I mentioned above) and &amp;nbsp;in a third case we saw CLK activity for about 122msec and some activity on CMD line. This activity (on CMD line) was repeated for several times in this122msec time window. The CLK frequency in this case is about 400KHz.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3. The LPDDR2 frequency is 400MHz. We ran the DDR Stress Test and modified the imximage.cfg file in accordance with the results obtained from the Test running.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;4. The changes you're talking about should be implemented in Kernel L3.10. In our case, we using the Kernel L4.1.15_2.0.0 and the mmc.c file also modified for eMMC v5.0.&amp;nbsp;&lt;/P&gt;&lt;P&gt;The U-Boot is prepared for eMMC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, as I mentioned before, this is our only issue and we stuck on this for a long&amp;nbsp;time. We need someone who can advise us and explain what could be the right solution. So can I talk with you or any other by phone? We don't see any other option.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 19 Feb 2017 13:00:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624577#M94793</guid>
      <dc:creator>yakovshaulov</dc:creator>
      <dc:date>2017-02-19T13:00:03Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6SL Unable Boot from eMMC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624578#M94794</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yakov,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Did you get anywhere with this? I am having the same issue. I am not sure how to modify this register value.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Aug 2018 17:26:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6SL-Unable-Boot-from-eMMC/m-p/624578#M94794</guid>
      <dc:creator>aliismail</dc:creator>
      <dc:date>2018-08-16T17:26:19Z</dc:date>
    </item>
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