topic Re: Inter-processor communication between Linux and RTOS in imx6 sabrelite in i.MX Processors

Inter-processor communication between Linux and RTOS in imx6 sabrelite

saravanankrish — Fri, 13 Jan 2017 17:33:02 GMT

Hello All,

I am using imx6 sabrelite board in which #Linux OS running on core0 and #RTOS on core2. My task is to establish inter-processor communication between two operating systems. My idea is to create shared memory section and allow read-write access using Software Generated Interrupts(SGI) between the cores. It would be really helpful for me if someone share their experience in this topic or suggest me some other approaches to accomplish this task.

Thanks in advance.

Re: Inter-processor communication between Linux and RTOS in imx6 sabrelite

igorpadykov — Sat, 14 Jan 2017 00:10:29 GMT

Hi saravanan

one can look at Chapter 51 Remote Processor Messaging

attached Linux Manual

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

Re: Inter-processor communication between Linux and RTOS in imx6 sabrelite

saravanankrish — Sat, 14 Jan 2017 13:29:33 GMT

Hello Igor,

Thanks a lot for your suggestion. i will look into the manual.

Re: Inter-processor communication between Linux and RTOS in imx6 sabrelite

saravanankrish — Mon, 16 Jan 2017 15:40:23 GMT

Hi,

I have gone through the documentation.

But , how can i implement the same on RTOS side? How can I send data from RTOS to Linux OS ?

Any suggestions from your side ? Thanks in advance

Re: Inter-processor communication between Linux and RTOS in imx6 sabrelite

wangzhimin — Fri, 18 May 2018 00:51:40 GMT

Can you solved this problem? I also encountered this problem. I would like to ask a question. To use SGI interrupts in both cores, do you need to register the interrupt function in both cores separately. if this will cause interference?