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    <title>topic DDR Stress Test (t0.1: data is addr test) Failed in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617110#M93431</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;We are using i.MX6 (MCIMX6Q7CVT08AC) on custom board,&amp;nbsp;and the i.MX6 accesses to micron DDR3 DRAM (mt41k256m16ha).&lt;/P&gt;&lt;P&gt;We tried DDR Stress Test &lt;STRONG&gt;v1.0.3&lt;/STRONG&gt; on this environment,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;******************************&lt;BR /&gt;DDR Stress Test (1.0.3) for MX6DQ &lt;BR /&gt;Build: Sep 18 2014, 11:11:44&lt;BR /&gt;Freescale Semiconductor, Inc.&lt;BR /&gt;******************************&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the test was failed at "t0.1: data is addr test".&lt;/P&gt;&lt;P&gt;-----------------------------------&lt;BR /&gt;loop: 543&lt;BR /&gt;DDR Freq: 528 MHz &lt;BR /&gt;t0.1: data is addr test&lt;BR /&gt;Address of failure: 0x103f07b0&lt;BR /&gt;Data was: 0x003f07b0&lt;BR /&gt;But pattern should match address&lt;BR /&gt;-----------------------------------&lt;/P&gt;&lt;P&gt;All boards we have produced were failed at the same test&amp;nbsp;item in 2~3 days (loop 450~650). Also all fail was caused by same symptom, some bit "1"&amp;nbsp;was flipped to "0". So we have tried latest Stress test,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="105652" data-objecttype="102" href="https://community.nxp.com/docs/DOC-105652"&gt;https://community.nxp.com/docs/DOC-105652&lt;/A&gt;&lt;BR /&gt;ddr_stress_tester_uboot_&lt;STRONG&gt;v2.60&lt;/STRONG&gt;.zip&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but it was not failed for over 4 days.&lt;/P&gt;&lt;P&gt;My question is, why there is a difference between new test&amp;nbsp;and old test, especially from test algorithm point of view.&lt;BR /&gt;We are currently concerned about Row Hammer possibility,&amp;nbsp;after this Stress Test. If there is vulnerability in our system,&amp;nbsp;we'd like to resolve the problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance,&lt;BR /&gt;Yamada&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 24 Mar 2017 13:24:39 GMT</pubDate>
    <dc:creator>masatsuguyamada</dc:creator>
    <dc:date>2017-03-24T13:24:39Z</dc:date>
    <item>
      <title>DDR Stress Test (t0.1: data is addr test) Failed</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617110#M93431</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;BR /&gt;We are using i.MX6 (MCIMX6Q7CVT08AC) on custom board,&amp;nbsp;and the i.MX6 accesses to micron DDR3 DRAM (mt41k256m16ha).&lt;/P&gt;&lt;P&gt;We tried DDR Stress Test &lt;STRONG&gt;v1.0.3&lt;/STRONG&gt; on this environment,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;******************************&lt;BR /&gt;DDR Stress Test (1.0.3) for MX6DQ &lt;BR /&gt;Build: Sep 18 2014, 11:11:44&lt;BR /&gt;Freescale Semiconductor, Inc.&lt;BR /&gt;******************************&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;the test was failed at "t0.1: data is addr test".&lt;/P&gt;&lt;P&gt;-----------------------------------&lt;BR /&gt;loop: 543&lt;BR /&gt;DDR Freq: 528 MHz &lt;BR /&gt;t0.1: data is addr test&lt;BR /&gt;Address of failure: 0x103f07b0&lt;BR /&gt;Data was: 0x003f07b0&lt;BR /&gt;But pattern should match address&lt;BR /&gt;-----------------------------------&lt;/P&gt;&lt;P&gt;All boards we have produced were failed at the same test&amp;nbsp;item in 2~3 days (loop 450~650). Also all fail was caused by same symptom, some bit "1"&amp;nbsp;was flipped to "0". So we have tried latest Stress test,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-wiki-small" data-containerid="2004" data-containertype="14" data-objectid="105652" data-objecttype="102" href="https://community.nxp.com/docs/DOC-105652"&gt;https://community.nxp.com/docs/DOC-105652&lt;/A&gt;&lt;BR /&gt;ddr_stress_tester_uboot_&lt;STRONG&gt;v2.60&lt;/STRONG&gt;.zip&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;but it was not failed for over 4 days.&lt;/P&gt;&lt;P&gt;My question is, why there is a difference between new test&amp;nbsp;and old test, especially from test algorithm point of view.&lt;BR /&gt;We are currently concerned about Row Hammer possibility,&amp;nbsp;after this Stress Test. If there is vulnerability in our system,&amp;nbsp;we'd like to resolve the problem.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance,&lt;BR /&gt;Yamada&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 24 Mar 2017 13:24:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617110#M93431</guid>
      <dc:creator>masatsuguyamada</dc:creator>
      <dc:date>2017-03-24T13:24:39Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Stress Test (t0.1: data is addr test) Failed</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617111#M93432</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We need to ask the developers what may be the difference.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please create a technical case:&lt;BR /&gt;&lt;A _jive_internal="true" href="https://community.nxp.com/thread/381898"&gt;https://community.nxp.com/thread/381898&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Victor&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 27 Mar 2017 03:14:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617111#M93432</guid>
      <dc:creator>b36401</dc:creator>
      <dc:date>2017-03-27T03:14:35Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Stress Test (t0.1: data is addr test) Failed</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617112#M93433</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the advice, I have created the case (Case 00110441).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Yamada&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 Mar 2017 11:34:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617112#M93433</guid>
      <dc:creator>masatsuguyamada</dc:creator>
      <dc:date>2017-03-28T11:34:43Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Stress Test (t0.1: data is addr test) Failed</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617113#M93434</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I see Igor suggested you to post this question on community.&lt;BR /&gt;If you do not get the information there please reopen case 00110441 and I will ask the developers team.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Victor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 29 Mar 2017 06:40:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617113#M93434</guid>
      <dc:creator>b36401</dc:creator>
      <dc:date>2017-03-29T06:40:00Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Stress Test (t0.1: data is addr test) Failed</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617114#M93435</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for help, although I posted to Stress Test v2.60 community,&lt;BR /&gt;currently no information.　So I would like to ask to developers team.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The Symptom seemed Row Hammer, I'd like to know whether there is difference&amp;nbsp;such as access frequency to the same address.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;Yamada&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Apr 2017 11:04:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Stress-Test-t0-1-data-is-addr-test-Failed/m-p/617114#M93435</guid>
      <dc:creator>masatsuguyamada</dc:creator>
      <dc:date>2017-04-05T11:04:11Z</dc:date>
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