i.MX ProcessorsのトピックL2 cache enabled

L2 cache enabled

MarkoPanger — Mon, 21 Nov 2011 15:25:55 GMT

Hi all,

Searching through the kernel sources I haven't found a point where L2 cache is enabled. Off course I might be wrong, but it seems L2 isn't enabled anywhere.

I'm using the i.mx50 distribution the L2.6.35_11.04.01 LTIB distribution.

Does somebody with more knowledge than me confirm this ?

Thanks, Marko

Re: L2 cache enabled

fabio_estevam — Tue, 22 Nov 2011 12:01:52 GMT

L2 cache is enabled in the bootloader.

See cpu/arm_cortexa8/mx50/generic.c:

http://opensource.freescale.com/git?p=imx/uboot-imx.git;a=blob;f=cpu/arm_cortexa8/mx50/generic.c;h=e1f55d1003b7e70dc81d90181a68210c602b2002;hb=15d65dcfb7fdc3395c54d0f81dc16605677f0a12

Re: L2 cache enabled

MarkoPanger — Thu, 24 Nov 2011 07:15:48 GMT

Thanks Fabio for pointing this out. Pretty confusing design by enabling portions of HW here and there.

My interest for L2 started when I've noticed that NEON pld instruction wasn't having any effect. So I wanted to check if the bits for enabling this instruction are set in cp15.

Marko

Fabio Estevam said:

L2 cache is enabled in the bootloader.

See cpu/arm_cortexa8/mx50/generic.c:
http://opensource.freescale.com/git?p=imx/uboot-imx.git;a=blob;f=cp...