topic Re: Is Write Leveling required for all DDR3? in i.MX Processors

Is Write Leveling required for all DDR3?

victorsv1978 — Tue, 22 Nov 2016 15:04:07 GMT

So we have a development project that used iMX6 and 4 modules of DDR3. There is a note on the schematic about bit swapping on low order bit of each byte must reside at bit 0 of the byte. Somehow, this was not followed by our third party PCB layout designer and he designed it as below. The PCB is now manufactured and being assembled at our SMT line. With the bit swapping issue, obviously we can not do write calibration.

My question is, does write calibration always required for DDR3? Can we still use the finished PCB to continue with our development?

Re: Is Write Leveling required for all DDR3?

igorpadykov — Tue, 22 Nov 2016 23:36:05 GMT

Hi Vic

finding optimal timings with write calibration improves

system stability, in general one can use ddr settings for

nxp reference boards with similar configuration.

Best regards
igor
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Re: Is Write Leveling required for all DDR3?

victorsv1978 — Wed, 23 Nov 2016 14:13:23 GMT

Hi Igor,

That you for your answer, that clarifies a lot. However, how can we use DDR settings from the reference boards and apply it to our design? Do you have any documentation how is it done?

Thanks,

Vic