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    <title>topic Re: eMMC5.0 Boot with Bus Width=8bit access for i.MX6 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/eMMC5-0-Boot-with-Bus-Width-8bit-access-for-i-MX6/m-p/610819#M92183</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rahul &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;emmc has internal non-volatile configuration register for bus width :&lt;/P&gt;&lt;P&gt;EXT_CSD [177] BOOT_BUS_WIDTH, which also should be programmed appropriately.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 14 Apr 2017 23:11:57 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2017-04-14T23:11:57Z</dc:date>
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      <title>eMMC5.0 Boot with Bus Width=8bit access for i.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/eMMC5-0-Boot-with-Bus-Width-8bit-access-for-i-MX6/m-p/610818#M92182</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We have one custom i.MX6S board which we are booting using eMMC.&lt;/P&gt;&lt;P&gt;I can see no difference in booting time when I set boot_cfg2[7:5] = 000 (1 bit) and boot_cfg2[7:5] = 010 (8 bit).&lt;/P&gt;&lt;P&gt;Can anyone please explain why this is happening. Ideally, when selecting 1-bit eMMC, booting time should be more than 8-bit booting time.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Apr 2017 07:05:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/eMMC5-0-Boot-with-Bus-Width-8bit-access-for-i-MX6/m-p/610818#M92182</guid>
      <dc:creator>rahulsoni</dc:creator>
      <dc:date>2017-04-14T07:05:50Z</dc:date>
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    <item>
      <title>Re: eMMC5.0 Boot with Bus Width=8bit access for i.MX6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/eMMC5-0-Boot-with-Bus-Width-8bit-access-for-i-MX6/m-p/610819#M92183</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rahul &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;emmc has internal non-volatile configuration register for bus width :&lt;/P&gt;&lt;P&gt;EXT_CSD [177] BOOT_BUS_WIDTH, which also should be programmed appropriately.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Apr 2017 23:11:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/eMMC5-0-Boot-with-Bus-Width-8bit-access-for-i-MX6/m-p/610819#M92183</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-04-14T23:11:57Z</dc:date>
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