i.MX ProcessorsのトピックARMv7-A requires separate exception vector handler https://community.nxp.com/t5/i-MX-Processors/ARMv7-A-requires-separate-exception-vector-handler/m-p/610236#M92064 <HTML><HEAD></HEAD><BODY><P><SPAN style="color: #242729; background-color: #ffffff;">ARMv7-A is Dual core, with Core0 and Core1. I am Implementing the exception handling in my application, configured the main stack and exception stack for both cores. </SPAN></P><P><SPAN style="color: #242729; background-color: #ffffff;">The vector address are same for both cores, so I would like to know, both core0 &amp; core1 requires same Exception Vector handler or separate?&nbsp;</SPAN></P></BODY></HTML> Fri, 28 Oct 2016 06:33:20 GMT ramesharise 2016-10-28T06:33:20Z ARMv7-A requires separate exception vector handler https://community.nxp.com/t5/i-MX-Processors/ARMv7-A-requires-separate-exception-vector-handler/m-p/610236#M92064 <HTML><HEAD></HEAD><BODY><P><SPAN style="color: #242729; background-color: #ffffff;">ARMv7-A is Dual core, with Core0 and Core1. I am Implementing the exception handling in my application, configured the main stack and exception stack for both cores. </SPAN></P><P><SPAN style="color: #242729; background-color: #ffffff;">The vector address are same for both cores, so I would like to know, both core0 &amp; core1 requires same Exception Vector handler or separate?&nbsp;</SPAN></P></BODY></HTML> Fri, 28 Oct 2016 06:33:20 GMT https://community.nxp.com/t5/i-MX-Processors/ARMv7-A-requires-separate-exception-vector-handler/m-p/610236#M92064 ramesharise 2016-10-28T06:33:20Z