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    <title>i.MX ProcessorsのトピックSetting for CCM</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Setting-for-CCM/m-p/608082#M91706</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Dear Sir&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I want to ask you about CCM (Clock Controller Module).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I refer to the i.MX6DualLite Reference manual (IMX6SDLRM Rev.2).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It is described at P816 in RM as the follows.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For critical system bus clocks,&lt;/SPAN&gt;･･･&lt;SPAN&gt;The mux for the serial clocks is not glitchless.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Q1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Are there any problem to write the same value on the bits of clock selector register and/or the bits of clock divider register without disable PLL and/or gating the input and output clocks?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Eishi SHIBUSAWA&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 12 Jan 2017 05:12:07 GMT</pubDate>
    <dc:creator>eishishibusawa</dc:creator>
    <dc:date>2017-01-12T05:12:07Z</dc:date>
    <item>
      <title>Setting for CCM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Setting-for-CCM/m-p/608082#M91706</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Dear Sir&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I want to ask you about CCM (Clock Controller Module).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I refer to the i.MX6DualLite Reference manual (IMX6SDLRM Rev.2).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It is described at P816 in RM as the follows.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For critical system bus clocks,&lt;/SPAN&gt;･･･&lt;SPAN&gt;The mux for the serial clocks is not glitchless.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Q1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Are there any problem to write the same value on the bits of clock selector register and/or the bits of clock divider register without disable PLL and/or gating the input and output clocks?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Eishi SHIBUSAWA&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Jan 2017 05:12:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Setting-for-CCM/m-p/608082#M91706</guid>
      <dc:creator>eishishibusawa</dc:creator>
      <dc:date>2017-01-12T05:12:07Z</dc:date>
    </item>
    <item>
      <title>Re: Setting for CCM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Setting-for-CCM/m-p/608083#M91707</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN&gt;Eishi&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;there will be no problem &lt;SPAN&gt; to write the same value on the bits of clock selector register &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt; and/or the bits of clock divider register&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 12 Jan 2017 07:17:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Setting-for-CCM/m-p/608083#M91707</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2017-01-12T07:17:59Z</dc:date>
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