topic Re: MCC for FreeRTOS in i.MX Processors

MCC for FreeRTOS

imanolallende — Tue, 21 Mar 2017 10:23:06 GMT

I have the IMX6SoloX SABRESD board. I have seen that there is a MCC example for MQX which achieve communication between both cores sharing a section of the RAM memory. However, for FreeRTOS there is only available the pingpong example which achieve communication through the MU. Is this correct?

I would like to achieve communication through the shared RAM but in FreeRTOS. Does someone know where I can founf the code?

Re: MCC for FreeRTOS

radimkratochvil — Tue, 21 Mar 2017 11:43:59 GMT

Hi Imanol,

the freeRTOS have RPMSG instead of MCC, but it also use share memory. You can find example str_echo_freertos for RPMSG.

Radim.

Re: MCC for FreeRTOS

imanolallende — Tue, 21 Mar 2017 12:28:43 GMT

Hi Radim,

Where can I find the RAM memory address used for the communication? Is the same as the shared region of the DTB?

Thank you for your response,

Imanol

Re: MCC for FreeRTOS

radimkratochvil — Tue, 21 Mar 2017 14:07:49 GMT

Hi Imanol,

it looks like, that it is hardcoded in the file arch/arm/mach-imx/imx_rpmsg.c

if (!strcmp(rpdev->rproc_name, "m4")) {
                        ret = of_device_is_compatible(np, "fsl,imx7d-rpmsg");
                        ret |= of_device_is_compatible(np, "fsl,imx6sx-rpmsg");
                        if (ret) {
                                /* hardcodes here now. */
                                rpdev->vring[0] = 0xBFFF0000;
                                rpdev->vring[1] = 0xBFFF8000;
                        }
                } else {
                        break;
                }

For more information you can look in the section 51 of i.MX_Linux_Reference_Manual and in the RPMSG_RTOS_Layer_User's_Guide

Radim.

Re: MCC for FreeRTOS

imanolallende — Wed, 22 Mar 2017 09:01:40 GMT

An which is the function of the MU in this example?

Apart form that, those memory addresses are of the DDR. Is it possible to change them in Linux and FreeRTOS (/freertos/middleware/multicore/open-amp/porting/imx6sx_m4/platform_info.c) to the Shared RAM addresses (0x91F000). Besides, which size does its ring need?

Thank you very much

Re: MCC for FreeRTOS

radimkratochvil — Thu, 23 Mar 2017 14:04:02 GMT

Hi Imanol,

It should be possible to use Shared RAM, but check in RDC if both cores can access this region of memory. The size of one buffer is 512 bytes. The MU isn't used in this example.

Radim.

Re: MCC for FreeRTOS

imanolallende — Fri, 24 Mar 2017 10:44:57 GMT

Hi Radim,

I have changed the address in the imx_rpmsg.c to:

rpdev->vring[0] = 0x91F000;
rpdev->vring[1] = 0x91F800;

The used DTB has the following shared memory:

fsl,shared-mem-addr = <0x91F000>;
fsl,shared-mem-size = <0x1000>;

In FreeRTOS the hardware_init.c file:

RDC_SetMrAccess(RDC, rdcMrOcram, 0x91f000, 0x920000, 0xFF, true, false);

The platform_info.c;

#define VRING0_BASE 0x91F000
#define VRING1_BASE 0x91F800

However, when I load the imx_rpmsg_tty.ko it does not create /dev/ttyRPMSG and it does with the default values. Do I miss something?

Re: MCC for FreeRTOS

radimkratochvil — Fri, 24 Mar 2017 15:09:16 GMT

Hi Imanol,

Did you rebuilt Linux kernel with changes in arch/arm/mach-imx/imx_rpmsg.c?

Radim.

Re: MCC for FreeRTOS

imanolallende — Mon, 27 Mar 2017 06:28:48 GMT

Hi Radim,

Yes, I did and /dev/ttyRPMSG does not appear.

Imanol

Re: MCC for FreeRTOS

radimkratochvil — Tue, 28 Mar 2017 07:04:30 GMT

Hi Imanol,

I tried to change the address and it worked. The only thing that I had to change was the addresses in the files imx_rpmsg.c and platform_info.c.

Radim.

Re: MCC for FreeRTOS

imanolallende — Tue, 28 Mar 2017 07:19:55 GMT

Hi Radim,

I only change those both and use the imx6sx-sdb-m4.dtb and I do not get it.

Which new addresses have you set?

Imanol

Re: MCC for FreeRTOS

radimkratochvil — Tue, 28 Mar 2017 07:26:54 GMT

Hi Imanol,

I set the addresses 0x91F000 and 0x91F800 as you suggested.

Radim.

Re: MCC for FreeRTOS

imanolallende — Tue, 28 Mar 2017 07:39:43 GMT

Hi Radim,

Which kernel do you use? I modify just those two files but I do not get it.

Re: MCC for FreeRTOS

radimkratochvil — Tue, 28 Mar 2017 07:40:51 GMT

Hi Imanol,

I used 3.14.52-1.1.0_ga. You can try to load binary with original address to M4 and if it will work, than we will know, that problem is in the Linux. You can also try to change the addresses to 0x908000 and 0x909000

Radim.

Re: MCC for FreeRTOS

imanolallende — Wed, 29 Mar 2017 07:37:19 GMT

Hi Radim,

It still does not work. I changed to 3.14.52-1.1.0_ga.

With the default value in M4 and the default value in imx_rpmsg.c and works.
With the default value in M4 and the MODIFIED value in imx_rpmsg.c and DOES NOT work.
With the MODIFIED value in M4 and the MODIFIED value in imx_rpmsg.c and DOES NOT work.

I use the imx6sx-sdb-m4.dtb and I copy the rpmsg_str_echo_freertos_example.bin and the Linux zImage its time I compile.

Imanol

Re: MCC for FreeRTOS

b50844 — Wed, 29 Mar 2017 12:29:05 GMT

Hi Imanol,

As you can see in the original hardcoded version, the VRING addresses are spaced by 0x8000 (32kB) and not 0x800 (2kB). The reason is that the size of one vring is (with the default configuration) 3*4096B = 12kB.
If you still want to use your layout, you will also need to change RPMSG_NUM_BUFS and/or RPMSG_BUF_SIZE so that your VRING fits into 2048.. But even if you do it like this, it will not work, since the VRING must take at least one page size, which is 4kB (> 2kB (0x800)). Also, if you change RPMSG_NUM_BUFS or RPMSG_BUF_SIZE, you need to do the same changes analogically on the M4/FreeRTOS side.

My recommendation is you use the same spacing as in the default case (0x8000), if you are not much size constrained.
I would also recommend you to have a look here: GitHub - EmbeddedRPC/erpc-imx-demos: eRPC demos for i.MX devices . It is a repository, where I tried to show, how to use RPMsg Lite + FreeRTOS vs. RPMsg in Linux on i.MX6SX SDB board.

Regards,
Marek NOVAK

Re: MCC for FreeRTOS

BiyongSUN — Fri, 31 Mar 2017 08:45:52 GMT

Like cortexA core has MMU. Typically, cortexM core uses MPU(Memory Protect Unit).

Please make your share memory no cacheable. 0xBFFF0000 map the default.

You need to modify the platform/devices/MCIMX6X/startup/system_MCIMX6X_M4.c.

Re: MCC for FreeRTOS

imanolallende — Mon, 03 Apr 2017 08:53:43 GMT

Hi Biyong,

I commented the following part of the system_MCIMX6SX_M4.c file and worked. The /dev/ttyRPMSG appears. However, when I do an "echo "test" > /dev/ttyRPMSG" Linux shows "root@imx6sx_all:/# virtio_rpmsg_bus virtio0: inbound msg too big: (512, 1026)" "virtio_rpmsg_bus virtio0: inbound msg too big: (-3584, 2)". I do not why this happens, besides, the M4 core receives the data correctly.

// /* M4 core clock root configuration. */

    // /* Initialize Cache */
    // /* Enable System Bus Cache */
    // /* set command to invalidate all ways and write GO bit
    //    to initiate command */
    // LMEM_PSCCR = LMEM_PSCCR_INVW1_MASK | LMEM_PSCCR_INVW0_MASK;
    // LMEM_PSCCR |= LMEM_PSCCR_GO_MASK;
    // /* Wait until the command completes */
    // while (LMEM_PSCCR & LMEM_PSCCR_GO_MASK);
    // /* Enable system bus cache, enable write buffer */
    // LMEM_PSCCR = (LMEM_PSCCR_ENWRBUF_MASK | LMEM_PSCCR_ENCACHE_MASK);
    // __ISB();

    // /* Enable Code Bus Cache */
    // /* set command to invalidate all ways and write GO bit
    //    to initiate command */
    // LMEM_PCCCR = LMEM_PCCCR_INVW1_MASK | LMEM_PCCCR_INVW0_MASK;
    // LMEM_PCCCR |= LMEM_PCCCR_GO_MASK;
    // /* Wait until the command completes */
    // while (LMEM_PCCCR & LMEM_PCCCR_GO_MASK);
    // /* Enable code bus cache, enable write buffer */
    // LMEM_PCCCR = (LMEM_PCCCR_ENWRBUF_MASK | LMEM_PCCCR_ENCACHE_MASK);
    // __ISB();
    // __DSB();

Re: MCC for FreeRTOS

BiyongSUN — Wed, 05 Apr 2017 02:21:26 GMT

You can not comment the code, instead, you need to add the code to configure the MPU(menory protect unit).

please check the attached patch.

The memory layout like following:

Re: MCC for FreeRTOS

imanolallende — Wed, 05 Apr 2017 08:25:43 GMT

Hi Biyong,

The example is done for the DDR but I am interested in the OCRAM. Therefore, I tried doing something similar to what you attached. However, it does not appear /dev/ttyRPMSG. If I comment the Enable Code Cache it does but with the message I commented in the previous comment.

I attached you my modifications.

Thank you