<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>i.MX ProcessorsのトピックRe: How to reconfigure ETH0/1 in imx6ull-14x14-evk.dts?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603772#M90901</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi chris,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you may find useful this post &lt;A href="https://community.nxp.com/thread/435333"&gt;How to disable the fec2 from the devicetree in imx6ulevk&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Carlos&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 21 Mar 2017 18:51:09 GMT</pubDate>
    <dc:creator>Carlos_Musich</dc:creator>
    <dc:date>2017-03-21T18:51:09Z</dc:date>
    <item>
      <title>How to reconfigure ETH0/1 in imx6ull-14x14-evk.dts?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603771#M90900</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The EVK base board has control lines for ENET2 shared with ECSPI4. I'm using ECSPI4 to control an LCD so would like to disable ENET2 in the DTS but have ENET1 configured and working. Could someone shed some light on the ethernet configuration in the dts file? I've included what I think are the relevant lines below. How do I change this to have one ethernet port ETH0 that uses the ENET1 peripheral?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;amp;fec1 {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-names = "default";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_enet1&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;phy-mode = "rmii";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;phy-handle = &amp;lt;&amp;amp;ethphy0&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;status = "okay";&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;&amp;amp;fec2 {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-names = "default";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_enet2&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;phy-mode = "rmii";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;phy-handle = &amp;lt;&amp;amp;ethphy1&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;status = "okay";&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;mdio {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;#address-cells = &amp;lt;1&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;#size-cells = &amp;lt;0&amp;gt;;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;ethphy0: ethernet-phy@2 {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;compatible = "ethernet-phy-ieee802.3-c22";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;reg = &amp;lt;2&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;ethphy1: ethernet-phy@1 {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;compatible = "ethernet-phy-ieee802.3-c22";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;reg = &amp;lt;1&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;};&lt;BR /&gt;};&lt;/P&gt;&lt;P&gt;...&lt;/P&gt;&lt;P&gt;&amp;amp;iomuxc {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-names = "default";&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;pinctrl-0 = &amp;lt;&amp;amp;pinctrl_hog_1&amp;gt;;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;imx6ul-evk {&lt;/P&gt;&lt;P&gt;...&lt;BR /&gt; pinctrl_enet1: enet1grp {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;fsl,pins = &amp;lt;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;P&gt;pinctrl_enet2: enet2grp {&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;fsl,pins = &amp;lt;&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031&lt;BR /&gt; &amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;gt;;&lt;BR /&gt; };&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Mar 2017 10:44:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603771#M90900</guid>
      <dc:creator>chris_f</dc:creator>
      <dc:date>2017-03-21T10:44:54Z</dc:date>
    </item>
    <item>
      <title>Re: How to reconfigure ETH0/1 in imx6ull-14x14-evk.dts?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603772#M90901</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi chris,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;you may find useful this post &lt;A href="https://community.nxp.com/thread/435333"&gt;How to disable the fec2 from the devicetree in imx6ulevk&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Regards,&lt;BR /&gt;Carlos&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Mar 2017 18:51:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603772#M90901</guid>
      <dc:creator>Carlos_Musich</dc:creator>
      <dc:date>2017-03-21T18:51:09Z</dc:date>
    </item>
    <item>
      <title>Re: How to reconfigure ETH0/1 in imx6ull-14x14-evk.dts?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603773#M90902</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks Carlos. That looks useful. Don't know why my searches didn't find that. I'll try it tomorrow.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Mar 2017 19:41:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603773#M90902</guid>
      <dc:creator>chris_f</dc:creator>
      <dc:date>2017-03-21T19:41:29Z</dc:date>
    </item>
    <item>
      <title>Re: How to reconfigure ETH0/1 in imx6ull-14x14-evk.dts?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603774#M90903</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;That link was useful but didn't solve the problem. I finally made it work by following the instructions here: &lt;A href="https://community.nxp.com/thread/387739"&gt;IMX6UL ethernet does work in u-boot but it doesn't with Kernel 3.14.38&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Note that I also needed to patch arch/arm/mach-imx/mach-imx6ul.c as recommended in that thread by&amp;nbsp;&lt;A class="jx-jive-macro-user" href="https://community.nxp.com/people/jiriluznicky"&gt;jiriluznicky&lt;/A&gt;&amp;nbsp;Patch attached here.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 22 Mar 2017 15:41:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603774#M90903</guid>
      <dc:creator>chris_f</dc:creator>
      <dc:date>2017-03-22T15:41:34Z</dc:date>
    </item>
    <item>
      <title>Re: How to reconfigure ETH0/1 in imx6ull-14x14-evk.dts?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603775#M90904</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;It doesn't end there though because my patch will not apply to the Yocto generated tree (I'd been working on an out of tree build) because the &lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;mach-imx6ul.c&lt;/SPAN&gt;&amp;nbsp;file had already been patched as part of a bbappend that I can't find. It's one of two kernel sources patched in this way. Nice little bear trap to waste four hours on.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 22 Mar 2017 18:10:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-reconfigure-ETH0-1-in-imx6ull-14x14-evk-dts/m-p/603775#M90904</guid>
      <dc:creator>chris_f</dc:creator>
      <dc:date>2017-03-22T18:10:21Z</dc:date>
    </item>
  </channel>
</rss>

