<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic VDD_ARM_CAP voltage level in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601467#M90447</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Dear Sir&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I want to ask you about the VDD_ARM_CAP.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The default value is 0b10000(1.100V) in PMU_REG_CORE[REG2_TARG].&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I think that it needs to change for 1.150V.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I refer to the Table 8. Operating Ranges in IMX6SDLAEC.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I think that it is able to change voltage level with REG2_TARG bits in PMU_REG_CORE register.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Q1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Does it change the PMU_REG_CORE[REG2_TARG] value from 0b10000 to 0b10011 in ROM code?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 12 Dec 2016 07:36:10 GMT</pubDate>
    <dc:creator>eishishibusawa</dc:creator>
    <dc:date>2016-12-12T07:36:10Z</dc:date>
    <item>
      <title>VDD_ARM_CAP voltage level</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601467#M90447</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Dear Sir&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I want to ask you about the VDD_ARM_CAP.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The default value is 0b10000(1.100V) in PMU_REG_CORE[REG2_TARG].&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I think that it needs to change for 1.150V.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I refer to the Table 8. Operating Ranges in IMX6SDLAEC.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I think that it is able to change voltage level with REG2_TARG bits in PMU_REG_CORE register.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Q1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Does it change the PMU_REG_CORE[REG2_TARG] value from 0b10000 to 0b10011 in ROM code?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Dec 2016 07:36:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601467#M90447</guid>
      <dc:creator>eishishibusawa</dc:creator>
      <dc:date>2016-12-12T07:36:10Z</dc:date>
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      <title>Re: VDD_ARM_CAP voltage level</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601468#M90448</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; The default , after reset, value of the &lt;SPAN&gt;REG2_TARG bit field is&amp;nbsp;0b10000(1.100V),&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;as stated in the RM, but there is fuse option to change this value. And really&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt; 1.150V is configured by manufacturer. So, customers should have devices&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;with 1.150 default voltage.&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 13 Dec 2016 04:58:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601468#M90448</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-12-13T04:58:13Z</dc:date>
    </item>
    <item>
      <title>Re: VDD_ARM_CAP voltage level</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601469#M90449</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN&gt;Dear Yuri&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you for your support.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Can I ask you some more additional questions?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;&lt;SPAN&gt;Customer's board on MCIMX6U6AVM08AC(Mass Production Rev.1.2 Device).&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;It seems that the VDD_SOC_CAP is changed at 1.15V after POR.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;OL start="2"&gt;&lt;LI&gt;&lt;SPAN&gt; SABRE platform for smart devices on PCIMX6U8DVM10AB(Prototype Sample)&lt;/SPAN&gt;&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;&lt;SPAN&gt;It seems that the VDD_SOC_CAP and VDD_ARM_CAP are not changed at 1.15V.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It seems that the two pins voltage are at 1.10V.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Q1.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is the VDD_SOC_CAP voltage change at 1.15V by manufacturer, too?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Q2.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It is not changed the voltage from 1.10V to 1.15V for Prototype Sample Device(PCIMX6U8DVM10AB).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;It is changed the voltage at 1.15V for the Mass Production device.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is this my understanding correct?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Best Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Eishi SHIBUSAWA,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Dec 2016 01:54:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601469#M90449</guid>
      <dc:creator>eishishibusawa</dc:creator>
      <dc:date>2016-12-15T01:54:44Z</dc:date>
    </item>
    <item>
      <title>Re: VDD_ARM_CAP voltage level</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601470#M90450</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp; Your understanding is correct.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Dec 2016 06:48:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDD-ARM-CAP-voltage-level/m-p/601470#M90450</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-12-15T06:48:37Z</dc:date>
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  </channel>
</rss>

