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    <title>i.MX Processorsのトピックi.MX6Q failure DRAM address decoding</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-failure-DRAM-address-decoding/m-p/599889#M90102</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;From i.mx6q platform. I get these DDR3 memory fail address (0x37f5ab3c;0x33e2ecd8;0x1619b724;0x1c229744) form uboot 2009.8 mtest test item.How can I get actual DRAM hardware address (such as DQ/bank/row/column )from these uboot failure address?&lt;/P&gt;&lt;P&gt;This board DRAM schematic&amp;nbsp;refer&amp;nbsp;to&amp;nbsp;i.MX6Q_SDB, System DRAM density is 1GB(based on 2Gb DDR3x16,4PCS ,CS0),DRAM use bank interleaving on mode. I try to decode 0x37f5ab3c address.Get the DRAM bank=5, ROW=0x5FD6,COL=0x2CF.&lt;/P&gt;&lt;P&gt;From address 0x37f5ab3c read data is 55455555,expect data is 55555555. I get the failure bit is Bit20.But i don't get DRAM DQ and which one DRAM fail.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Other address failure info:&lt;/P&gt;&lt;P&gt;ADD 0x33e2ecd8 read out data is 0xAAEAAAAA,expected data is 0xAAAAAAAA;&lt;/P&gt;&lt;P&gt;ADD 0x1619b724 read out data is 0x45555555,expected data is 0x55555555;&lt;/P&gt;&lt;P&gt;ADD 0x1c229744 read out data is 0xAAABAAAA,expected data is 0xAAAAAAA.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;Linjun&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 12 Dec 2016 04:15:04 GMT</pubDate>
    <dc:creator>linjunwei8</dc:creator>
    <dc:date>2016-12-12T04:15:04Z</dc:date>
    <item>
      <title>i.MX6Q failure DRAM address decoding</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-failure-DRAM-address-decoding/m-p/599889#M90102</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;From i.mx6q platform. I get these DDR3 memory fail address (0x37f5ab3c;0x33e2ecd8;0x1619b724;0x1c229744) form uboot 2009.8 mtest test item.How can I get actual DRAM hardware address (such as DQ/bank/row/column )from these uboot failure address?&lt;/P&gt;&lt;P&gt;This board DRAM schematic&amp;nbsp;refer&amp;nbsp;to&amp;nbsp;i.MX6Q_SDB, System DRAM density is 1GB(based on 2Gb DDR3x16,4PCS ,CS0),DRAM use bank interleaving on mode. I try to decode 0x37f5ab3c address.Get the DRAM bank=5, ROW=0x5FD6,COL=0x2CF.&lt;/P&gt;&lt;P&gt;From address 0x37f5ab3c read data is 55455555,expect data is 55555555. I get the failure bit is Bit20.But i don't get DRAM DQ and which one DRAM fail.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Other address failure info:&lt;/P&gt;&lt;P&gt;ADD 0x33e2ecd8 read out data is 0xAAEAAAAA,expected data is 0xAAAAAAAA;&lt;/P&gt;&lt;P&gt;ADD 0x1619b724 read out data is 0x45555555,expected data is 0x55555555;&lt;/P&gt;&lt;P&gt;ADD 0x1c229744 read out data is 0xAAABAAAA,expected data is 0xAAAAAAA.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;P&gt;Linjun&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 12 Dec 2016 04:15:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6Q-failure-DRAM-address-decoding/m-p/599889#M90102</guid>
      <dc:creator>linjunwei8</dc:creator>
      <dc:date>2016-12-12T04:15:04Z</dc:date>
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