topic Re: i.MX7 EIM supported data width. in i.MX Processors https://community.nxp.com/t5/i-MX-Processors/i-MX7-EIM-supported-data-width/m-p/599832#M90095 <HTML><HEAD></HEAD><BODY><P>I got this answer from hardware team:</P><P>This chip only supports up to 16 bits of data on the weim interface. The 32 bit selection does not apply to this SOC.</P></BODY></HTML> Tue, 20 Sep 2016 08:31:18 GMT joanxie 2016-09-20T08:31:18Z i.MX7 EIM supported data width. https://community.nxp.com/t5/i-MX-Processors/i-MX7-EIM-supported-data-width/m-p/599831#M90094 <HTML><HEAD></HEAD><BODY><P>Hi community,</P><P></P><P>I have a question about i.MX7 EIM.<BR />Would you let me know what data width is supported?<BR />Acctually, some parts of datasheet (IMX7DCEC Rev.2) or reference manual (IMX7DRM Rev.0) say "16/32-bit supported", but other part say "x8/x16 supported".<BR />For example, page 5 of IMX7DCEC says "16/32-bit NORFlash", and description of DSZ field in IMX7DRM (p.2562) mentions 32 bit port.<BR />On the other hand, Table 2 and Table 37 in IMX7DCEC mention about only 8/16 bit, and chapter 9.7.1.1 of IMX7DRM also mentions only 8/16 bit.<BR />So I'm confused which is correct.</P><P></P><P>Best Regards,<BR />Satoshi Shimoda</P></BODY></HTML> Thu, 08 Sep 2016 09:16:23 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX7-EIM-supported-data-width/m-p/599831#M90094 satoshishimoda 2016-09-08T09:16:23Z Re: i.MX7 EIM supported data width. https://community.nxp.com/t5/i-MX-Processors/i-MX7-EIM-supported-data-width/m-p/599832#M90095 <HTML><HEAD></HEAD><BODY><P>I got this answer from hardware team:</P><P>This chip only supports up to 16 bits of data on the weim interface. The 32 bit selection does not apply to this SOC.</P></BODY></HTML> Tue, 20 Sep 2016 08:31:18 GMT https://community.nxp.com/t5/i-MX-Processors/i-MX7-EIM-supported-data-width/m-p/599832#M90095 joanxie 2016-09-20T08:31:18Z