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    <title>i.MX Processors中的主题 Nand Flash Controller Driver for iMX257PDK 3stack</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Nand-Flash-Controller-Driver-for-iMX257PDK-3stack/m-p/187332#M9002</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am developing my own nand flash controller driver for iMX257PDK and having some issue while reading a page. I am using the default development board. It has&amp;nbsp;K9LBG08U0D-PCB0:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1 Page = (4K + 218)Bytes&lt;/P&gt;&lt;P&gt;1 Block = (4K + 218)B x 128 Pages =&amp;nbsp;(512K +27.25K) Bytes&lt;/P&gt;&lt;P&gt;1 Device = (4K + 218)B x 128 Pages x 8,192 Blocks =&amp;nbsp;34,512 Mbits&lt;/P&gt;&lt;P&gt;1,024K Pages&amp;nbsp;= 8,192 Blocks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have configured the NFC controller and implemented the read/write page APIs. Right now I am able to write 1 page and read it successfully but I am getting ECC errors (ECC_STATUS_RESULT1,&amp;nbsp;ECC_STATUS_RESULT2) when trying to read the second page of same block. 95% data I read is correct but read page operation disturb some bytes thats why NFC return ECC error (0xFFFF) in both status registers.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any chip errata for NFC?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;WinCE has implemented SwapBBI function and it has the following comments for this function:&lt;/P&gt;&lt;P&gt;/ *This function implements the BBI(Bad Block Information) swap workaround for the NFC design flaw. */&lt;/P&gt;&lt;P&gt;Please tell me what is meant by this flaw in NFC design?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 15 Nov 2011 07:01:19 GMT</pubDate>
    <dc:creator>ZaheerAhmad</dc:creator>
    <dc:date>2011-11-15T07:01:19Z</dc:date>
    <item>
      <title>Nand Flash Controller Driver for iMX257PDK 3stack</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Nand-Flash-Controller-Driver-for-iMX257PDK-3stack/m-p/187332#M9002</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am developing my own nand flash controller driver for iMX257PDK and having some issue while reading a page. I am using the default development board. It has&amp;nbsp;K9LBG08U0D-PCB0:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;1 Page = (4K + 218)Bytes&lt;/P&gt;&lt;P&gt;1 Block = (4K + 218)B x 128 Pages =&amp;nbsp;(512K +27.25K) Bytes&lt;/P&gt;&lt;P&gt;1 Device = (4K + 218)B x 128 Pages x 8,192 Blocks =&amp;nbsp;34,512 Mbits&lt;/P&gt;&lt;P&gt;1,024K Pages&amp;nbsp;= 8,192 Blocks&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I have configured the NFC controller and implemented the read/write page APIs. Right now I am able to write 1 page and read it successfully but I am getting ECC errors (ECC_STATUS_RESULT1,&amp;nbsp;ECC_STATUS_RESULT2) when trying to read the second page of same block. 95% data I read is correct but read page operation disturb some bytes thats why NFC return ECC error (0xFFFF) in both status registers.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is there any chip errata for NFC?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;WinCE has implemented SwapBBI function and it has the following comments for this function:&lt;/P&gt;&lt;P&gt;/ *This function implements the BBI(Bad Block Information) swap workaround for the NFC design flaw. */&lt;/P&gt;&lt;P&gt;Please tell me what is meant by this flaw in NFC design?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 15 Nov 2011 07:01:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Nand-Flash-Controller-Driver-for-iMX257PDK-3stack/m-p/187332#M9002</guid>
      <dc:creator>ZaheerAhmad</dc:creator>
      <dc:date>2011-11-15T07:01:19Z</dc:date>
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