i.MX Processors中的主题 Re: SDMA access in A7 and M4 cores of the imx7s

SDMA access in A7 and M4 cores of the imx7s

vivekrajpara — Fri, 09 Dec 2016 14:02:33 GMT

Hi All,

I need to use SDMA on imx7s SoC for both cores Cortex A7 and Cortex M4.

- I think I need to use RDC on M4 to access this peripheral. I have question about Linux on A7, does current FreeScale Linux repository have RDC used for SDMA?

- SDMA generate interrupt when any script execution is completed. Does this interrupt received by both cores?

I need to access SAI1 from M4 and SAI2 from A7 through SDMA. Is it possible?

Best Regards,

Vivek Rajpara

Re: SDMA access in A7 and M4 cores of the imx7s

igorpadykov — Fri, 09 Dec 2016 23:49:22 GMT

Hi Vivek

>does current FreeScale Linux repository have RDC used for SDMA?

I am afraid not

> SDMA generate interrupt when any script execution is completed. Does this interrupt received by both cores?

yes

>I need to access SAI1 from M4 and SAI2 from A7 through SDMA. Is it possible?

yes

Best regards
igor
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

Re: SDMA access in A7 and M4 cores of the imx7s

vivekrajpara — Tue, 13 Dec 2016 05:11:30 GMT

Hi Igor,

Thank you for quick reply.

I just need some more clarification on these questions.

As pe rmy understanding, I need to configure SDMA and SAI from both cores and I would get SDMA interrupt in both the cores simulataneously. I can serve this interrupt on A7 side for SAI 1 interface and serve interrupt on m4 side for SAI 2 interface. Is my understanding correct?

To achieve this, I would need to write SAI and SDMA driver for FreeRTOS code of the M4 core with RDC, Also I would require to change SDMA driver on linux side (running on A7) to include RDC. Is this correct understanding?

Best Regards,

Vivek Rajpara

Re: SDMA access in A7 and M4 cores of the imx7s

igorpadykov — Tue, 13 Dec 2016 05:35:02 GMT

Hi Vivek

yes in general this is correct understanding.

Best regards
igor

Re: SDMA access in A7 and M4 cores of the imx7s

erickrieg — Wed, 12 Apr 2017 19:12:36 GMT

my experience was that SDMA is way complex and I couldn't find any example projects I could build - so given the A7 is really fast, I am just having the processor move things. I think I should be able to get an interrupt on the A7 to soon work ok.

Re: SDMA access in A7 and M4 cores of the imx7s

igorpadykov — Sun, 23 Jul 2017 23:28:33 GMT

some sdma examples can be found in MX6UL FreeRTOS SDK2.2
Board Support Packages (7)
SDK2.2_iMX6UL_WIN(REV SDK2.2)
http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/i.mx-processors/i.mx-6-processors/i.mx-6ultralite-processor-low-power-secure-arm-cortex-a7-core:i.MX6UL?tab=Design_Tools_Tab

Best regards
igor

Re: SDMA access in A7 and M4 cores of the imx7s

narendray — Thu, 28 Sep 2017 11:24:08 GMT

How you have implemented SDMA in cortex m4