topic Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200 in i.MX Processors

phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

titusstalin — Tue, 25 Oct 2016 10:04:16 GMT

Dear All,

I have the following custom camera, want to get a frame from camera using iMX6 sabrelite EVM board.

At power ON, our camera will generate the frames continuously at 800x600 45fps in RGB565 format (data type is 22)

Camera sensor bit clock is 48MHz

Byte clock is 187.5MHz

Camera MIPI TX is configured for 1.5Gbps (187.5 * 8bit data)

1 Lane

Not sure about the virtual channel.

Board name:

I am using Sabrelite iMX6 EVM board from boundary devices (J16 MIPI port)

I have also tried to connect the OV5640 MIPI camera to the board and able to get the frames.

For my custom sensor, I have created the driver based on the ov5640_mipi.c driver and did the following as per my camera sensor.

1) Set data lane to 1

2) Set 0x44 in MIPI_CSI2_PHY_TST_CTRL1 register as I have differential clock is 187.5MHz (Not sure, please suggest me if anything.)

3) I think, we don't have virtual channel in our camera so I set "virtual channel" as 0 (default) so I used IPU0 and CSI0.

4) Here is the MIPI CSI register dump:

MIPI_CSI2_VERSION 3130302a
MIPI_CSI2_N_LANES 1
MIPI_CSI2_PHY_SHUTDOWNZ 1
MIPI_CSI2_DPHY_RSTZ 1
MIPI_CSI2_CSI2_RESETN 1
MIPI_CSI2_PHY_STATE 210
MIPI_CSI2_DATA_IDS_1 0
MIPI_CSI2_DATA_IDS_2 0
MIPI_CSI2_ERR1 0
MIPI_CSI2_ERR2 0
MIPI_CSI2_MASK1 0
MIPI_CSI2_MASK2 0
MIPI_CSI2_PHY_TST_CTRL0 0
MIPI_CSI2_PHY_TST_CTRL1 4444
MIPI_CSI2_SFT_RESET 0

Can you please anyone provide the support please ?

Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

Carlos_Musich — Tue, 01 Nov 2016 16:58:30 GMT

Hi Titus,

We are not able to reproduce your issue and run tests as we don´t have the board you are using. But probably gary_bisson from Boundary devices may comment something on this.

Regards,

Carlos

Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

gary_bisson — Tue, 01 Nov 2016 17:01:21 GMT

Hi,

Since it is a custom camera I won't be able to reproduce either. Can you reproduce the problem with the standard OV5640 MIPI camera?

Regards,

Gary

Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

titusstalin — Mon, 14 Nov 2016 06:41:09 GMT

Sorry for the delay in responding.

Thanks Carlos and Gary for your replies.

Yes, I'm able to reproduce with OV5640 MIPI camera when I change the camera frame speed 30fps to 45fps.

But that could not help to resolve the problem.

I found one post that we should stop the streaming when we set the MIPI DPHY clock setting (mipi reset function)

As I said earlier, my custom camera would start stream the image when I power ON the camera.

I disabled the stream when MIPI PHY reset and then able to get the frames now.

Thanks for your support.

Regards,

Titus S.

Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

johndusing — Tue, 13 Dec 2016 20:40:05 GMT

Titus,

Were you able to resolve your problem? I have a similar situation where I am streaming a 1366x768 video (4-CSI-2 lanes) at 60fps, but cannot get above 30. Started with the OV5440 Driver and modified.

Thanks,

John D.

Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

titusstalin — Wed, 14 Dec 2016 10:55:10 GMT

Yes, I'm able to fix the problem.

But my problem is different than yours.

I'm not able to get the frames even with 30fps but for you, not working more than 30fps.

Try 720Px60fps (1280x720 60fps) settings.

Re: phy_rxclk_activehs bit is not set and MIPI_CSI2_PHY_STATE is 0x210 and 0x200

johndusing — Wed, 14 Dec 2016 13:20:57 GMT

Thank you for the reply.

My frame rate is fixed a 60fps. I will look into the registers to see if there is some way I can time the EOF packets from the CSI2 stream.

John