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    <title>topic Re: Single Lane Mipi interface to i.mx6 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593183#M89264</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rogerio,&lt;/P&gt;&lt;P&gt;but, when you setup single data lane, do you think is it possible to use lane2 instead of lane1?&lt;BR /&gt;do you know which steps can let me obtain that?&lt;/P&gt;&lt;P&gt;thank you, regards&lt;BR /&gt;Andrea&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 22 Aug 2016 06:51:13 GMT</pubDate>
    <dc:creator>adc1</dc:creator>
    <dc:date>2016-08-22T06:51:13Z</dc:date>
    <item>
      <title>Single Lane Mipi interface to i.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593179#M89260</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a need to connect a single lane mipi interface to the i.mx6 solo. NXP documentation says that this is supported. Before I connect my own target HW I would like to verify this is working with a known good setup.&lt;/P&gt;&lt;P&gt;The Sabre board has the OV5640 which supports 2lane mipi, but I cannot get single lane mipi working with this camera. I am not able to confirm if the OV5640 even supports single lane as the camera documentation is not clear to me.&lt;/P&gt;&lt;P&gt;Has anyone successfully connected single lane mipi to i.mx6? what camera is used? Can you share experience? &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My target HW is a parallel output camera which will go through a parallel to Mipi CSI-2 bridge chip. We need single lane mipi due to connector pin limitations.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Jul 2016 02:02:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593179#M89260</guid>
      <dc:creator>jamiemaxwell</dc:creator>
      <dc:date>2016-07-01T02:02:45Z</dc:date>
    </item>
    <item>
      <title>Re: Single Lane Mipi interface to i.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593180#M89261</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jamie&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;both i.MX6S and OV5640 support single lane mode,&lt;/P&gt;&lt;P&gt;for OV5640 trgister 0x300E MIPI CONTROL 00&amp;nbsp; Bit[7:5]: mipi_lane_mode&lt;/P&gt;&lt;P&gt;000: One lane mode&lt;/P&gt;&lt;P&gt;001: Two lane mode&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Jul 2016 05:48:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593180#M89261</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-07-01T05:48:51Z</dc:date>
    </item>
    <item>
      <title>Re: Single Lane Mipi interface to i.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593181#M89262</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jamie,&lt;/P&gt;&lt;P&gt;I'm using "One lane mode", does it exist any configuration to let sensor use only lane 2?&lt;/P&gt;&lt;P&gt;for OV5640 register 0x4800 MIPI CTRL 00&amp;nbsp; Bit[3]: 0 Use lane1 as default data lane, 1 Use lane2 as default data lane&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I configure it to use lane2 as default I obtain a MIPI data error during transfer. Is it possible to use MIPI excluding first lane?&lt;BR /&gt;thank you, regards&lt;BR /&gt;Andrea&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Jul 2016 16:21:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593181#M89262</guid>
      <dc:creator>adc1</dc:creator>
      <dc:date>2016-07-20T16:21:25Z</dc:date>
    </item>
    <item>
      <title>Re: Single Lane Mipi interface to i.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593182#M89263</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can check the following doc:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-332436"&gt;Using only one lane on OV5640 MIPI + i.MX6 SabreSD&lt;/A&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 08 Aug 2016 17:27:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593182#M89263</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2016-08-08T17:27:17Z</dc:date>
    </item>
    <item>
      <title>Re: Single Lane Mipi interface to i.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593183#M89264</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Rogerio,&lt;/P&gt;&lt;P&gt;but, when you setup single data lane, do you think is it possible to use lane2 instead of lane1?&lt;BR /&gt;do you know which steps can let me obtain that?&lt;/P&gt;&lt;P&gt;thank you, regards&lt;BR /&gt;Andrea&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Aug 2016 06:51:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593183#M89264</guid>
      <dc:creator>adc1</dc:creator>
      <dc:date>2016-08-22T06:51:13Z</dc:date>
    </item>
    <item>
      <title>Re: Single Lane Mipi interface to i.mx6</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593184#M89265</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Andrea,&lt;/P&gt;&lt;P&gt;Unfortunately not possible. Just the options below:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_0.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/1589i8C0FD15ED9381A67/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_0.png" alt="pastedImage_0.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Rogerio&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 22 Aug 2016 14:21:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Single-Lane-Mipi-interface-to-i-mx6/m-p/593184#M89265</guid>
      <dc:creator>rogerio_silva</dc:creator>
      <dc:date>2016-08-22T14:21:34Z</dc:date>
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