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    <title>topic UART5 pads(Pins) initialization in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/UART5-pads-Pins-initialization/m-p/591744#M89162</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Following the code snippet is to initialize the four pads/pins as UART5 pins, I am just wondering if there are something wrong? such as the initializing sequence for each pin, and values for the relative registers? Those that I am not quite sure are the Select Input Registers setting. Such as in lines 5 &amp;amp; 11,&amp;nbsp; 17 &amp;amp; 23. I mean why the same value is used to set Select Input Register? Could please someone have a comment on this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yang&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. // Config uart5.UART5_CTS_B to pad &lt;STRONG style="text-decoration: underline;"&gt;KEY_ROW4&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;2. (int *)020e_0268 = 4;&lt;/P&gt;&lt;P&gt;3. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;4. (int *)020e_0650 = 0x0001B0B0;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;5. (int *)020e_0918 = 2;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;6.&lt;/P&gt;&lt;P&gt;7. // Config uart5.UART5_RTS_B to pad &lt;STRONG style="text-decoration: underline;"&gt;KEY_COL4&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;8. (int *)020e_0254 = 4;&lt;/P&gt;&lt;P&gt;9. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;10. (int *)020e_063c = 0x000130B0;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;11. (int *)020e_0918 = 2;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;12.&lt;/P&gt;&lt;P&gt;13. // Config uart5.UART5_RX_DATA to pad &lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;KEY_ROW1&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;14. (int *)020e_025c = 4;&lt;/P&gt;&lt;P&gt;15. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;16. (int *)020e_0644 = 0x0001B0B0;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;17. (int *)020e_091c = 3;&lt;/STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // KEY_ROW1_ALT4&lt;/P&gt;&lt;P&gt;18.&lt;/P&gt;&lt;P&gt;19. // Config uart5.UART5_TX_DATA to pad &lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;KEY_COL1&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;20. (int *)020e_0248 = 4;&lt;/P&gt;&lt;P&gt;21. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;22. (int *)020e_0630 = 0x0001B0B0;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial, helvetica, sans-serif;"&gt;&lt;STRONG&gt;23. (int *)020e_091c = 3&lt;/STRONG&gt;&lt;/SPAN&gt;;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // KEY_ROW1_ALT4&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 30 Jun 2016 15:49:40 GMT</pubDate>
    <dc:creator>mail2yangliu</dc:creator>
    <dc:date>2016-06-30T15:49:40Z</dc:date>
    <item>
      <title>UART5 pads(Pins) initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART5-pads-Pins-initialization/m-p/591744#M89162</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Following the code snippet is to initialize the four pads/pins as UART5 pins, I am just wondering if there are something wrong? such as the initializing sequence for each pin, and values for the relative registers? Those that I am not quite sure are the Select Input Registers setting. Such as in lines 5 &amp;amp; 11,&amp;nbsp; 17 &amp;amp; 23. I mean why the same value is used to set Select Input Register? Could please someone have a comment on this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Yang&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. // Config uart5.UART5_CTS_B to pad &lt;STRONG style="text-decoration: underline;"&gt;KEY_ROW4&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;2. (int *)020e_0268 = 4;&lt;/P&gt;&lt;P&gt;3. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;4. (int *)020e_0650 = 0x0001B0B0;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;5. (int *)020e_0918 = 2;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;6.&lt;/P&gt;&lt;P&gt;7. // Config uart5.UART5_RTS_B to pad &lt;STRONG style="text-decoration: underline;"&gt;KEY_COL4&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;8. (int *)020e_0254 = 4;&lt;/P&gt;&lt;P&gt;9. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;10. (int *)020e_063c = 0x000130B0;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;11. (int *)020e_0918 = 2;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;12.&lt;/P&gt;&lt;P&gt;13. // Config uart5.UART5_RX_DATA to pad &lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;KEY_ROW1&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;14. (int *)020e_025c = 4;&lt;/P&gt;&lt;P&gt;15. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;16. (int *)020e_0644 = 0x0001B0B0;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;17. (int *)020e_091c = 3;&lt;/STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // KEY_ROW1_ALT4&lt;/P&gt;&lt;P&gt;18.&lt;/P&gt;&lt;P&gt;19. // Config uart5.UART5_TX_DATA to pad &lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;KEY_COL1&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;20. (int *)020e_0248 = 4;&lt;/P&gt;&lt;P&gt;21. // ENABLED, 100K_OHM_PU, PULL, ENABLED, DISABLED, 100MHZ, 40_OHM, SLOW&lt;/P&gt;&lt;P&gt;22. (int *)020e_0630 = 0x0001B0B0;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: arial, helvetica, sans-serif;"&gt;&lt;STRONG&gt;23. (int *)020e_091c = 3&lt;/STRONG&gt;&lt;/SPAN&gt;;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // KEY_ROW1_ALT4&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 30 Jun 2016 15:49:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART5-pads-Pins-initialization/m-p/591744#M89162</guid>
      <dc:creator>mail2yangliu</dc:creator>
      <dc:date>2016-06-30T15:49:40Z</dc:date>
    </item>
    <item>
      <title>Re: UART5 pads(Pins) initialization</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART5-pads-Pins-initialization/m-p/591745#M89163</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yang&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;please look at Chapter 30 IOMUX Controller (IOMUXC)&lt;/P&gt;&lt;P&gt;i.MX6SL Reference Manual &lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fref_manual%2FIMX6SLRM.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/ref_manual/IMX6SLRM.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;igor&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 01 Jul 2016 01:31:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART5-pads-Pins-initialization/m-p/591745#M89163</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-07-01T01:31:08Z</dc:date>
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