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    <title>topic Re: Is address incremented when using i.MX6SDL EIM continuous BCLK? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580733#M88378</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;&amp;nbsp; In synchronous mode, after address assertion, a burst of sequential&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;data can be accessed, assuming address incrementing is provided &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;by an external device (internally). Start address of the burst is provided &lt;BR /&gt;by i.MX6 master. Burst length is configured in EIM. From section 22.5.4 &lt;BR /&gt;(Burst Mode (Synchronous) Memory Operation) of the i.MX6 S/DL RM :&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt; “When this mode is set, the controller attempts to translate the Master burst &lt;BR /&gt;accesses to memory burst accesses, being limited by the memory burst length, &lt;BR /&gt;predefined by BL value, or memory and Master WRAP/INCR boundary crossing &lt;BR /&gt;non-matching. Only the first address accessed is put by the controller on the external &lt;BR /&gt;address bus in a memory burst sequence.” &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;&amp;nbsp; The continuous mode is differ from single burst in such manner that &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;the clock is not stopped right after burst finish.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 28 Jun 2016 08:37:53 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2016-06-28T08:37:53Z</dc:date>
    <item>
      <title>Is address incremented when using i.MX6SDL EIM continuous BCLK?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580732#M88377</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi community,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Our customer have a question about i.MX6SDL EIM.&lt;/P&gt;&lt;P&gt;They consider using EIM continuous BCLK, but didn't understand whether address is incremented when using continuous BCLK.&lt;/P&gt;&lt;P&gt;Would you let me know it?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 Jun 2016 08:03:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580732#M88377</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2016-06-28T08:03:57Z</dc:date>
    </item>
    <item>
      <title>Re: Is address incremented when using i.MX6SDL EIM continuous BCLK?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580733#M88378</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;&amp;nbsp; In synchronous mode, after address assertion, a burst of sequential&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;data can be accessed, assuming address incrementing is provided &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;by an external device (internally). Start address of the burst is provided &lt;BR /&gt;by i.MX6 master. Burst length is configured in EIM. From section 22.5.4 &lt;BR /&gt;(Burst Mode (Synchronous) Memory Operation) of the i.MX6 S/DL RM :&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt; “When this mode is set, the controller attempts to translate the Master burst &lt;BR /&gt;accesses to memory burst accesses, being limited by the memory burst length, &lt;BR /&gt;predefined by BL value, or memory and Master WRAP/INCR boundary crossing &lt;BR /&gt;non-matching. Only the first address accessed is put by the controller on the external &lt;BR /&gt;address bus in a memory burst sequence.” &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;&amp;nbsp; The continuous mode is differ from single burst in such manner that &lt;/SPAN&gt;&lt;/P&gt;&lt;P class="tm5 a______"&gt;&lt;SPAN class="tm6"&gt;the clock is not stopped right after burst finish.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;Yuri&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 28 Jun 2016 08:37:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580733#M88378</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-06-28T08:37:53Z</dc:date>
    </item>
    <item>
      <title>Re: Is address incremented when using i.MX6SDL EIM continuous BCLK?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580734#M88379</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Yuri,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;According to your reply, the address signal from i.MX6 is not incremented, so external device have to increment internally by its own, right?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Satoshi Shimoda&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Jul 2016 08:20:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580734#M88379</guid>
      <dc:creator>satoshishimoda</dc:creator>
      <dc:date>2016-07-05T08:20:24Z</dc:date>
    </item>
    <item>
      <title>Re: Is address incremented when using i.MX6SDL EIM continuous BCLK?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580735#M88380</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;gt; &lt;SPAN style="color: #51626f; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif;"&gt; the address signal from i.MX6 is not incremented, so external device &lt;BR /&gt;&amp;gt; have to increment internally by its own, right?&lt;/SPAN&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Correct.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Jul 2016 11:08:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Is-address-incremented-when-using-i-MX6SDL-EIM-continuous-BCLK/m-p/580735#M88380</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2016-07-20T11:08:06Z</dc:date>
    </item>
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