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    <title>topic Re: RGMII power in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574435#M87864</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vadim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Table 2-21 does not show that RGMII can be left unpowered.&lt;/P&gt;&lt;P&gt;It should be powered even not used.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 31 Aug 2016 10:25:36 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2016-08-31T10:25:36Z</dc:date>
    <item>
      <title>RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574432#M87861</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;P&gt;If the NVCC_RGMII1 and/or NVCC_RGMII2 pins of iMX6SX can be not powered (some time or totally)?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Vadim Aleynikov&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Aug 2016 12:26:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574432#M87861</guid>
      <dc:creator>vadimaleynikov</dc:creator>
      <dc:date>2016-08-30T12:26:34Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574433#M87862</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vadim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;all power supplies should be provided to processor&lt;/P&gt;&lt;P&gt;with exceptions given in Table 2-21. Recommended connections&lt;/P&gt;&lt;P&gt;for unused analog interfaces i.MX6 System Development User’s Guide&lt;/P&gt;&lt;P&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fcache.freescale.com%2Ffiles%2F32bit%2Fdoc%2Fuser_guide%2FIMX6DQ6SDLHDG.pdf" rel="nofollow" target="_blank"&gt;http://cache.freescale.com/files/32bit/doc/user_guide/IMX6DQ6SDLHDG.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Aug 2016 23:43:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574433#M87862</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-08-30T23:43:33Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574434#M87863</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor.&lt;/P&gt;&lt;P&gt;Thank you for the reply. Table 2-21, which you referred to, contains RGMII. If my understanding is correct, then this means that the RGMII can be left unpowered when it isn't used. Please confirm or correct me.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Vadim&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Aug 2016 07:52:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574434#M87863</guid>
      <dc:creator>vadimaleynikov</dc:creator>
      <dc:date>2016-08-31T07:52:42Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574435#M87864</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vadim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Table 2-21 does not show that RGMII can be left unpowered.&lt;/P&gt;&lt;P&gt;It should be powered even not used.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Aug 2016 10:25:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574435#M87864</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-08-31T10:25:36Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574436#M87865</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Igor.&lt;/P&gt;&lt;P&gt;Unfortunately your answers are not quite clear to me. In the first reply you wrote:&lt;/P&gt;&lt;P&gt;"all power supplies should be provided to processor with exceptions given in Table 2-21"&lt;/P&gt;&lt;P&gt;Table 2-21 contains the RGMII module, but in the next reply you wrote: "Table 2-21 does not show that RGMII can be left unpowered." It seems to me that these&amp;nbsp;statements are not quite consistent. &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does Table 2-21 presents exceptions of the power supplies which must be provided or not?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then, in the NXP Reference Design schematics ( MCIMX6SX SDB: SPF-27962.pdf), the iMX6SX RGMII modules are supplied by&amp;nbsp; Ethernet PHY chips U18 and U19. And power supplies of U18 and U19 are under software control by signals PERI_PWR_EN and ENET_PWR_EN_B; both these signals are inactive on default. So, on the MCIMX6SX SDB the NVCC_RGMII1 and NVCC_RGMII2 may be not powered totally or at least, they will not be powered all the time depending&amp;nbsp; on the used software.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If this (SPF-27962.pdf) implementation of RGMII and PHY power is correct?&lt;/P&gt;&lt;P&gt;If the iMX6SX RGMII modules can be not powered at least a part of the system operation time?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards,&lt;BR /&gt;Vadim&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 31 Aug 2016 12:33:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574436#M87865</guid>
      <dc:creator>vadimaleynikov</dc:creator>
      <dc:date>2016-08-31T12:33:57Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574437#M87866</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vadim&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;board design was done when not all documentation was ready,&lt;/P&gt;&lt;P&gt;also for i.MX6SX Table 2-17. Recommended connections for unused analog interfaces&lt;/P&gt;&lt;P&gt;there is no RGMII&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="http://www.nxp.com/files/32bit/doc/user_guide/IMX6SXHDG.pdf" title="http://www.nxp.com/files/32bit/doc/user_guide/IMX6SXHDG.pdf"&gt;http://www.nxp.com/files/32bit/doc/user_guide/IMX6SXHDG.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Sep 2016 03:26:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574437#M87866</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2016-09-01T03:26:29Z</dc:date>
    </item>
    <item>
      <title>Re: RGMII power</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574438#M87867</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you Igor very much.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Vadim&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 01 Sep 2016 09:37:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/RGMII-power/m-p/574438#M87867</guid>
      <dc:creator>vadimaleynikov</dc:creator>
      <dc:date>2016-09-01T09:37:42Z</dc:date>
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